Electronics Forum | Tue Aug 28 12:05:42 EDT 2001 | mparker
The advantage of DPMO is that the numbers used are PPM, (Part Per Million), rather than percentage. Percentage can distort, depending on volume. For instance, 100 units processed, 25 defects found = 75 percent yield. 4 units processed, 1 defect found
Electronics Forum | Mon Sep 16 13:29:37 EDT 2013 | larrygroves
a lot depends on the age and type of equipment you are using . Older equipment can have a lot of problems with smaller parts. If all is well with your feeders and machine you should expect something like 99.8 to 99.9 percent. some parts will be ident
Electronics Forum | Sat Jun 12 10:23:18 EDT 1999 | Dean
| How are you inspecting pcbs post-reflow, are you inspecting all or sampling. The type of assembly involved would be mainly chip components with a mix of actives and a few 25mil and under pitch. | If you sample what are your fault rates looking lik
Electronics Forum | Mon Apr 20 14:59:14 EDT 2009 | c111
We are in a position where we have to purchase Leadfree BGA's and have them re-balled as leaded. I'm looking for some data from anyone who has done large volume outsource. 1) What percent fallout should I expcet from the re-balling process. 2) After
Electronics Forum | Mon Mar 25 15:51:04 EST 2002 | davef
ASQC re-numbered the once free (taxpayer sponsored development) MIL-STD-105 as ASQ-Z1.4, slapped their own cover on it, and now charge $40 or $50 for the same document! The standards are identical, so see if you can get one of the old �MIL-STD's� and
Electronics Forum | Mon Aug 16 20:19:10 EDT 2004 | Grant
Hi, We have both Vapor Phase ASSCON semi auto as well as Soltec convection inline ovens. I must say we had no end of problems with Vapor Phase. We tried everything, and just could not totally eliminate tomb-stoning completely. We would always get a
Electronics Forum | Thu Aug 12 22:31:10 EDT 1999 | Dave F
| Hello, | | Can any netters suggest what critical parameters should be considered & what are there assoicated impacts for a solder paste printing process ... | | B.Regards, | Felix | Felix: There are some 30 variables that affect SMT solder qua
Electronics Forum | Wed May 07 08:10:22 EDT 2003 | Pon
Hi all Are there any advice pls. let me know. Our customer Void spec. at BGA and CSP is less than 10%. Usually we found void defect at BGA and CSP component around 2-3 % but sone lot the defect rate is up to 18%. I have read some input from this w
Electronics Forum | Mon Jul 17 11:28:16 EDT 2006 | SWAG
Lower RH = more static build-up on production floor = greater chance of ESD damage to product. Primarily, I think your SMT print job can be affected by RH which could cause defects like the ones you mention. Look at ANSI/ESD S20.20 for more info an
Electronics Forum | Fri Jan 08 10:11:15 EST 1999 | Tim
This is a question for those of you who actually assemble components onto a board. Any idea what the "industry standard" is for fall out on assembled PCB's? I realize that the controls put in place in your processes will effect your overall quality
