Electronics Forum | Thu Sep 12 18:54:21 EDT 2002 | scottefiske
PTH to SMT spacing should be 80-100 thous. any closer will result in bridging. Scott
Electronics Forum | Thu Aug 29 20:01:23 EDT 2002 | davef
Many people use the same spacing [and pad designs] as they use for primary side SMT. We don�t. DOWN STREAM SMT-TO-SMT SPACING: In addition to proper orientation, components cannot be immediately upstream of terminations that are to be soldered or b
Electronics Forum | Mon Apr 27 02:44:07 EDT 2009 | michafogel
Can someone point me to a standard, if there is any, or design rule regards with preffared spacing between PTH and SMT pads for LF wave soldering process (SAC alloy)
Electronics Forum | Fri May 01 06:49:31 EDT 2009 | davef
minimum space between selective wave soldering pallet's opening to the nearest PTH or SMT pad? * http://www.agicorp.com/pdf_files/Designguidelines903.pdf * http://www.datumdynamics.com/resources/dfm_wavesolder.html?PHPSESSID=a73b3bc8bbd55519bffbb68
Electronics Forum | Thu Apr 30 02:39:48 EDT 2009 | michafogel
Thanks for the info so far, but still need a number or a formula to calculate. The site you have point me to can support in a way, but if I want to release a design procedure to our editors, a number will be very helpful. One more issue is what can b
Electronics Forum | Tue Apr 28 07:45:07 EDT 2009 | davef
When using high tin solder, doesn't proper specing to avoid the effects of tin whiskers become at least as large an issue as proper specing for defect-free wave solder processing?
Electronics Forum | Tue Apr 28 04:07:56 EDT 2009 | davepick
There's a nice tool on this site - http://www.enhancetechnical.co.uk/ Click on Internet Tools and then the image - brings up a useful interactive tools which helps understand influences on wave solder bridges. Dave
Electronics Forum | Thu Apr 30 22:40:32 EDT 2009 | davef
Selective Wave Soldering DoE to Develop DfM Guidelines for Lead and Pb-Free Assemblies Written by Makram Boulos, Craig Hamilton, Mario Moreno, Ramon Mendez, German Soto and Jessica Herrera Circuits Assembly Magazine, 31 December 2008 19:00
Electronics Forum | Mon Aug 01 20:02:20 EDT 2005 | Joseph
We use SAC305 and top side particular joint temp. is 110 deg C, and the terminal finish for that particular lead is pure tin. It look like hot tearing at the primary side of PTH.
Electronics Forum | Wed Aug 10 10:41:23 EDT 2005 | patrickbruneel
Bob, Great theory if you're selling SN100C, but I have to disagree that an alloy being 4�C off eutectic will cause cracks. When a solder joint exits the solder wave, there is an immediate drop in temperature of 100�C. so being off 4�C is irrelevant.