Electronics Forum: rv/d does not reach required position (Page 1 of 1)

Waves soldering: not enough solder remaining on pads

Electronics Forum | Sun May 21 23:29:38 EDT 2017 | zsoden

Hi all, We run an old Seho 1135C wave solder with a 63/37 pot at 250°C. It has been running well for a couple of years but we have noticed lately that all of the larger pads (terminal blocks, transformers, etc.) require additional solder to be appli

Share info for Six sigma - BB

Electronics Forum | Sat Mar 03 14:51:22 EST 2001 | stefwitt

Hi Dave, I think 6 sigma is here to stay. Unlike any other programs like ISO, six sigma goes to the people�s mind. With drastic examples like � you would not fly a plane which reaches its destination in a three sigma probability � you start to think

solder paste printing

Electronics Forum | Fri Mar 29 10:11:02 EDT 2019 | cyber_wolf

“For a number of years now, work has been proceeding in order to bring perfection to the crudely conceived idea of a transmission that would not only supply inverse reactive current for use in unilateral phase detractors, but would also be capable of

baking boards, revisited

Electronics Forum | Fri Oct 04 11:34:42 EDT 2002 | Bob Willis

Some additional comments from a paper may be of interest. Baking Printed Circuit Boards - Why and How Baking printed boards prior to conventional and surface mount assembly should not be necessary. Often boards are baked for historical reasons; in

Re: BGA repair/rework

Electronics Forum | Sun Mar 07 08:19:24 EST 1999 | Earl Moon

| | | | | | | | I'm having a fun time between BGA rework/repair using an SRT 1000 and SPC efforts (much easier) using DEK stencil printing processes and BTU reflow with 6 Fuji lines in between. | | | | | | | | Concerning the BGA stuff, I'm getting

Re: DFM / DFT information

Electronics Forum | Thu Jul 13 22:20:38 EDT 2000 | Dave F

=10 mils larger than lead 3 silk screen legend text weight >=10 mils 4 pads >=15 mils larger than finished hole sizes 5 place through hole components on 50 mil grid 6 no silk screen legend text over vias (if vias not solder masked) or holes 7 so

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