Electronics Forum: smt critical to quality (Page 1 of 6)

How to calcualte the capa. of smt line in high mix low volume.

Electronics Forum | Tue Sep 11 19:54:52 EDT 2001 | gsparka

HELLO. SMTNETERS there is no company in high mix low volume system in our contry so . what is the best way to calculate the capa. of smt line in high mix low volume. & what is the general way to get the defect rate to evaluate the smt line(or sm

Converting to 'No-Clean' process

Electronics Forum | Fri Apr 14 13:30:20 EDT 2000 | Murad Kurwa

Hi All: Can you tell me specifically if you converted an exiting product made with Clean process using WS609 or compatible to 'No-Clean' process. We have to convert assemblies from current clean process at a CEM to No-Clean process in our own factor

applying DOE to SMT process

Electronics Forum | Mon Jun 19 21:29:41 EDT 2000 | Jack Hou

Hi, everyone, I'm an new engineer and in charge of SMT process. Now I want to apply DOE to printing process. some questions to ask you guys. 1. how many replications do i need in each run (L8) ? 2. after printing, except solder height, volume, what's

ICT testing to improve yields

Electronics Forum | Mon Aug 27 10:23:41 EDT 2012 | cobham1

I need to clarify something for everyone. The end customer is the Military. Our customers are military suppliers who do in fact have quality systems in place. When we build the product we end up potting the unit so the customer never looks at the ele

Re: Registration to be Optional

Electronics Forum | Mon Apr 19 17:27:48 EDT 1999 | Tuffty

I think the optional registration is a great idea, strange as this sound's some companies - mine being 1 are not happy about it's engineer's voicing thing's on forum's. Which is a bit backward to say the least scared in case we give the 'enemy' a han

Re: Successful Transfers to Contract Manufacturers

Electronics Forum | Tue Apr 27 15:37:00 EDT 1999 | Justin Medernach

| As I transfer prototypes/pilots out of my shop (because the designs are mature or Engineering confidence is high). How do I minimize my risk and ensure success for both the CEM and my boards. | | Best Regardsgroup. This would include low tech as

gas to extend allowed print-to-place time?

Electronics Forum | Mon May 02 12:35:33 EDT 2016 | adamjs

Or try : http://www.sipad.com/ I think sipad is incredibly cool and would be the perfect solution, but is way too expensive. We're paying $0.80/each for four-layer ENIG boards, 50cm^2 with 0.125mm trace/space and 0.8mm-pitch LGA landings in lots of

Used auto printer; any to avoid?

Electronics Forum | Wed Jun 15 17:03:52 EDT 2016 | ttheis

It's hit and miss with older machines I know, but we've been able to get through a lot of stuff with good documentation and help from people on this forum and the oem's. We have put toghether our own smt line with ~20yr old machines for about 5-7% of

Re: applying DOE to SMT process

Electronics Forum | Tue Jun 20 20:22:15 EDT 2000 | Dave F

Hi Jack: Welcome!!!! Yours sounds like an interesting project. In response to your questions: A1. Each traditional L8 run requires 8 runs. So, how did you select a L8? A2. In addition solder height and volume as characteristics, consider deposit

Re: Adding a trace to a PB

Electronics Forum | Mon Jun 21 18:33:46 EDT 1999 | Deon Nungaray

| We have a need to add a trace to a large quantity of bare PB's. The trace goes from a 25 mil QFP pad to a via. The rework must be done before we process the board. The rework cannot interfere with the solder paste screening process. | | Does a

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