Electronics Forum: solder bump height tolerance for coplanarity (Page 1 of 1)

Re: Capability Study for Solder Printing Process

Electronics Forum | Sat Sep 23 15:13:40 EDT 2000 | Francois Racine

Hi Sophia, I`m responsible of SMT line and we solved this problem with a complete automatic solder paste printer machine. In the past we had problem with off alignment and solder height too.... at that time we used a semi-auto printer machine and w

Re: Solder Paste Dispensing for BGA repair

Electronics Forum | Fri Nov 26 06:18:18 EST 1999 | stefano bolleri

Jeff & Ted, we have used a dispensing system too and yes, I agree, we are not too happy with the results. Not at the point that it doesn't work, though. I think our problem basicly is that we have selected an entry-level dipensing system. We are app

Re: Land patterns for 0612 and 0508 capacitors

Electronics Forum | Tue Nov 30 21:23:55 EST 1999 | cklau

hello; When we are doing component land pattern design , one thing will always be in our mind; that is the basic criteria or common land pattern design guideline for reflow and flow solder assemblies. For basic fomula in calculating resistors are:

Re: help help! Water clean for CSP/BGA package

Electronics Forum | Tue Oct 05 04:01:36 EDT 1999 | Brian

| Hi, | | Help! Could anyone help to enlighten me on this? | | Question: | | If I have a CSP/BGA package of size X by Y and the standoff gap between the component and PCB is Z, What is the maximum allowable Y/Z or X/Z that using a normal water cl

flip chip tolerances

Electronics Forum | Fri Jun 01 14:50:29 EDT 2001 | Matt Gormont

I am looking for outline tolerances of a flip chip with a pitch of .25mm. Bumps are made of 63/37 solder. Key tolerances are bump height and positional tolerance of the bumps. Can anyone HELP?

Lifted Lead

Electronics Forum | Fri Sep 10 17:32:59 EDT 2004 | Yngwie

We have recently faced lifted lead problem that happened on our 20 mil pitch QFP. We have infact pushed it back to the incoming quality, but still I have a few questions to bring up : 1) what is the typical coplanarity tolerance that ICs' manufactur

Excess Flux in uBGA rework

Electronics Forum | Mon Sep 24 17:38:18 EDT 2001 | mparker

First question - do you have a rework station? If so, are you experiencing the same type of failures there? I have successfully used no-clean on uBGA's in the past. 6 mil solder bumps, 10 mil spacing. 88 sites. Are you reusing previously soldered uB

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