Electronics Forum: solderability test lf hasl (Page 1 of 16)

Poor solderability

Electronics Forum | Wed Feb 09 19:55:27 EST 2000 | Russ

Hello All! I have a problem that hopefully someone out there might have some ideas. I have an assembly that upon the "dental pick test" the entire solder fillet is coming up with the lead and leaving what appears to be a bare pad. I believe that th

Re: Poor solderability

Electronics Forum | Fri Feb 11 18:09:11 EST 2000 | Glenn Robertson

Russ - I agree with the other guys that the problem could be black pad or some intermetallic problem, possibly related to the "conversion" to HASL finish. But my first guess is still partial reflow at wave soldering. You won't catch it by push

BGA Pull test

Electronics Forum | Tue Oct 26 08:41:56 EDT 2004 | Bob R.

When we first got into BGAs on ENIG we were getting joint cracking at in-circuit test. The joints were breaking in the Sn-Ni intermetallic. We did a lot of pull testing while working with our board suppliers and our conclusion was that pull testing

International certification programme for lead-free product test

Electronics Forum | Tue Feb 03 09:36:05 EST 2004 | davef

Unfortunately, IPC-D-279, IPC-TM-650, IPC-TR-464, and MIL-STD-810 will not answer your questions, because they do NOT address LF-solders. Even the tests in IPC-9701 need to be modified for LF-solders, because: * LF-solder has different creep behavior

piercing of test vias at ICT

Electronics Forum | Thu Nov 14 09:24:07 EST 2002 | joconnell

What about when debugging the board I recently saw a case where we damaged a board between - 5-10 cycles of the fixture It's a catch 22 - where you need high force probes to breal the OSP - but the copper is hard surface, not like the solder HASL a

piercing of test vias at ICT

Electronics Forum | Fri Nov 15 15:02:37 EST 2002 | MA/NY DDave

OK I know it is funny to have two different PWB/PCB processes, one for pre production and one post production yet it is possible if controlled and implemented in a strategy. In debug if your company's experience has been for a repeated need to do IC

Solderability test method (LF) for bare PCB brd

Electronics Forum | Mon Jan 23 20:58:08 EST 2006 | davef

J-STD-003B - Solderability Tests for Printed Boards is currently a "Working Draft". Look here: http://www.ipc.org/status.asp

Solderability test method (LF) for bare PCB brd

Electronics Forum | Mon Jan 23 03:12:13 EST 2006 | adeline_ko

The FA department is using IPC or J-STD-003 to do the solderability test for the leaded PCB FA qualification. Class A. However, there is no mention of Lead free testing for the PCB bare brd. Can anyone advise whether IPC has release a solderability

Solderability Issues

Electronics Forum | Fri Aug 13 17:45:43 EDT 2010 | bradlanger

Boards with the LF hasl finish applied too thin will genrally pass the IPC test. That is some pretty agressive flux they call out. The boards usually wave solder just fine as well. Reflow is where the you see the problem.

SN100C Selective Solder Voiding

Electronics Forum | Mon Nov 10 12:29:59 EST 2008 | joeherz

Dave, You've got me worried - All of the boards we've tested to this point are LF HASL. Why do you say "can't be ENIG"? Am I missing something? We have not sectioned soldered boards as yet but plan to shortly. Thanks.

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