Electronics Forum | Fri Aug 01 00:40:06 EDT 2008 | roc2x
thanks,my pad design is 24 x 23 mils and now I chnged my stencil to 24 x 20 mils ship inwrds to lower down my volume. My placement is and part data are ok. My reflow N2 is using 1000ppm, Actual is 700-800ppm I already prolonged my pre-heat butit only
Electronics Forum | Thu Jul 31 23:52:12 EDT 2008 | roc2x
Hi, Im having problem on tombstone, The part is LF chip component 1005, and my solder paste is WS leded. tombstone is not in a deg angle but one side is soldered but the other side is just sitting on the solder. Looks like my solder can not wick up t
Electronics Forum | Fri Aug 01 00:22:46 EDT 2008 | fowlerchang
Pattern design, paste volume,printing misalignment, place misalignment,reflow process include N2 usage. All the factor above can make tombstome happen. And the most important factor is placement misalignment except design issue. But pls check the sol
Electronics Forum | Fri Aug 01 02:10:26 EDT 2008 | fowlerchang
Pad design is not only the size of pad but also the distance between two pad. N2 will increase tombstone as we tested. 10 zones reflow oven and slow temperature ramp will reduce this defect. MustII is the equipment which is used to test the solderabi
Electronics Forum | Wed Jun 23 17:56:31 EDT 2004 | Shean Dalton
Acetone is likely not compatible with several component types, the evaporation charactoristics are desirable. IPA is more compatible, though, may not solubilize the residues. Austin American Technology developed MegaSolv JB and MegaSolv NOC for the
Electronics Forum | Wed Sep 10 15:54:57 EDT 2008 | slthomas
"When we solving a problem we have to be absolutely sure it's really solved." Conversely, it's always good to return things back to the way they were when you conclude that THAT knob turn didn't solve the problem.
Electronics Forum | Tue Sep 14 05:59:16 EDT 1999 | Edmund Loh
Can anyone out there pls enlighten me on how to solve chip tombstone defects. I am running a board with a lot of 0603 chip. i had fine the profile and the alignment, but it still happen randomly on the board itself. Is there any other way to solve t
Electronics Forum | Sat Oct 18 04:22:47 EDT 2003 | kanwal324
Please go through the manual. resetting the CMOS setting will solve your problem. Its better you consult with machine manufacturer if problem is not solved.
Electronics Forum | Fri Dec 17 02:52:40 EST 2010 | Jacki
Hi Dave Thanks however the Forums you mentioned isn't enough to solve my proble, PCB warpage after cooling down. Hope someone can advise me more.
Electronics Forum | Thu Mar 03 08:06:36 EST 2011 | scottp
I've seen this with through hole via in pad with soldermask plugging from the opposite side. Baking the boards solved it. Not using such a horrible via in pad method would also have solved it, but that wasn't an option. Is this ball sitting on a v
