Electronics Forum | Sun Mar 06 17:39:15 EST 2005 | Darby
1st law of Surface Mount. You WILL run out of parts on the last board going through before a long weekend. 2nd law of Surface Mount. Touchies WILL touch. I'm with Russ and Rob. Touch up is EVIL and should only be tolerated in exceptional circumst
Electronics Forum | Wed Mar 12 10:26:10 EDT 2008 | realchunks
Why would a board failure related problem be a process problem. I agree most companies believe EVERY problem is a Proces Problem, but in the real world we know this is not true. A pad lifting means your solder joint was able to rip it off the boa
Electronics Forum | Thu Nov 12 23:09:30 EST 1998 | Lynn Lai
I want to find information about SMT and PCB: Process Manufacturing How it work
Electronics Forum | Mon Apr 08 20:43:58 EDT 2002 | davef
Regardless of the design technology of the board, we use shop floor management software that: * Calculates the period that it takes to assemble a job. Obviously, we enter product-manufacturing information [ie, BOM, material receipt dates, process fl
Electronics Forum | Thu Mar 03 09:04:26 EST 2005 | russ
Been following this thread and have a question, Why do "touch-up" people follow different criteria than "Q.C." people. It sounds like the root of the problem is not addressed but bandaids are being put into place. We have no "Q.C." department and
Electronics Forum | Mon May 07 11:02:17 EDT 2001 | Singh
Hi all. I am looking into the implementation of the Chip on Board process with eutactic bonding and the then using either gold or aluminum wire to make wedge type wire bonding. Since I am totally new to this, can somebody guide me thru the process,
Electronics Forum | Sat Jan 25 17:46:07 EST 2003 | testing
I am currently finding it challenging(help!) to determine how I can introduce SPC ontrol within the AOI process and how the AOI can help control other SMT processes. Can someone please provide me with some ideas or any of excels fancy charts/macro
Electronics Forum | Tue Mar 01 10:55:07 EST 2005 | spot
A lot depends on the complexity of the board/process as well as the amount of placements. If the board has few placements and the parts are not smaller that 0805 then doing all the rework after completion is ok. The human eye can only pick out obvi
Electronics Forum | Mon Jul 18 16:48:54 EDT 2005 | lupo
Hello, According with quality standards TS16949 ,QS 9000 etc. improvement can be perform when the process is stable and capable. So, if DOE is method for improvement it is a good idea, first to run SPC for investigation process stability and capa
Electronics Forum | Fri May 17 10:53:15 EDT 2013 | davef
ENEPIG or Imm Pd? Concerns about palladium as a solderability protection are: * Palladium is more difficult to process in fab than gold * Palladium solder alloys can be brittle, similar to gold, without proper soldering process and/or specification/
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