Electronics Forum: stencil tension analysis (Page 15 of 24)

Re: STENCILS

Electronics Forum | Mon Jun 29 13:50:48 EDT 1998 | Russ Miculich

| WHAT SHOULD THE RATIO BE OF STENCIL APERATURE TO PAD TO GET GOOD QUALITY RESULTS. BY THAT I MEAN, A MINIMM OF SOLDER BALLS, AND LITTLE TO NO BRIDGING, SHORTS, ETC.. | RIGHT NOW WE ARE USING A 1:1 RATIO, BUT ARE INVESTIGATING REDUCING THE APERATU

Voids in solder fillet

Electronics Forum | Wed Apr 16 13:19:13 EDT 2003 | Takfire

Thanks Russ! The origianal complaint from the customer was in regards to what appeared as "bumpy" appearance and "holes" in the solder fillet. This problem was originally presented as an appearance issue only. Further investigation by our DPA lab r

Re: QFP solder paste volume

Electronics Forum | Sun May 23 15:12:59 EDT 1999 | JohnW

| We are running a number of boards with 8-10 25 mil PQFPs on board. Our process is mature with at least 3 years experiance and statistically few opens on the QFPs. Our beloved purchasing department has chased the almighty $ and changed FAB vendor

Fillet Tearing

Electronics Forum | Thu Mar 23 22:26:53 EST 2006 | Joseph

Dear all, Referring comment from Mr. Jack,IPC director certification & assembly technology, the term "fillet tearing" is too broad. Cracks or fractures in the required fillet area, with SnPb or LF alloy and whether you call it tearing or not, is a D

Re: Help-Wire Bonding Defects Analysis After Encapsulation

Electronics Forum | Thu Dec 03 13:39:52 EST 1998 | Russ M

| | | | I have some 1.25 mils Al wire bonding chip on board process. After epxoy-based encapsulation, I do some aging test. How can I "see" or prove that there is a "wire break" exist due to the tension of thermal cycling? How can I know the failure

more info- os error, screen(hex) dump

Electronics Forum | Tue Oct 05 15:39:35 EDT 2010 | daxman

Hi Steve, I don't know if there are a lot of people who can decrypt the trace data. I think the manual mentions sending it to fuji for analysis. Maybe that would be something worth checking into. Regarding the Mecca check mode: I don't know if it wi

Chip Components with big ground pads - Unsolder

Electronics Forum | Tue Feb 10 15:13:06 EST 2004 | patthemack

Hey Vinny, Sorry I haven't looked at this for a while. 3 things to try: Tombstoning- The ground plane side is larger because the solder mask allows for a little slop at the board shop (clearance around a pad of a few mils). Since there is not a defi

Dek compared to MPM

Electronics Forum | Wed Nov 07 02:41:58 EST 2001 | marshall_shuai

Dear Mr. Jeff, Our SMT room are using the DEK288 and MPM2030 Printers at the same time. We found the similar problem also as mentioned by MR.JOHNW. We analysis it was mainly caused by the PCB metal fixture used in DEK288. The PCB metal fixture is

Lumpy joints

Electronics Forum | Mon Dec 17 11:20:12 EST 2001 | slthomas

Well, I was able to convince them we had a serious problem on the poorly reflowed boards without spending 2k on off- site analysis. Now all we have to do is sort out the ones that flowed well but had solder balls (looks like a damaged stencil prob

BGA Solderability Issue

Electronics Forum | Tue Nov 17 22:36:17 EST 2009 | rajeshwara

Hi All Plz help , we are manufacturer of Set Top Boxes , where we use ST BGA 5202 ,Paste : ALPHA METAL OM338-T45-LF & STENCIL : 4 MIL & we also tried 5 mil . Problem : At first Test BGA work fine but after some days Assembly dead functional and when


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