Electronics Forum | Sat Aug 05 09:19:50 EDT 2000 | JAX
Felix, 1-5: A step stencil is simply a stencil with area's of different thickness( step down's ). They are used for multi-package boards( BGA, fine-pitch, ..... ). They keep you from deciding whether or not you want the fine-pitch or the BGA devices
Electronics Forum | Sun Nov 22 10:05:37 EST 1998 | Christopher Lampron
| Does any body know stencil manufacturer in states or south east asia for electroforming processes and step down from 5mil to 3mil. | | Thanks! | Daniel, I do alot of work with Photoetch stencils in Massaschusetts. I do not have the Phone number h
Electronics Forum | Thu Feb 23 19:55:30 EST 2006 | pjc
Not sure on stepped stencil designs, very application specific. Try consulting with your stencil supplier. Most of the big suppliers have applications engineering support. You can send them your board data and they can review and advise. Also, consid
Electronics Forum | Fri Feb 24 09:24:08 EST 2012 | bobpan
1. You should be running the machine from the computer and central contoller. (not the handheld or run button on machine) 2. What is the tep commands in your sequence steps....I think you need to have tep vision as the first step and tep vpass at the
Electronics Forum | Thu Nov 11 14:13:57 EST 1999 | Dave F
Thomas: From what you're telling us, you seem to be thinking correctly: 1 Paste should not spread appreciably in preheat 2 Something has changed, because you've not had this problem, until recently Two things to consider: 1 Has any thing changed
Electronics Forum | Thu Aug 26 14:45:09 EDT 1999 | Earl Moon
| What are the key steps to achieving high yield with CSP ??? | | (We are trying qualify vendors for volume fab/assembly of some | products which use several CSP devices on each side of the | board. (Some with 0.5mm ball pitch)) | | Looking throu
Electronics Forum | Wed Oct 07 15:15:04 EDT 1998 | Joe P.
| I am currently experimenting with Pin-To-Paste reflow. does anyone know some excellent references or links that could give me tips and tricks, optimal aperature dimensions, etc. I have been informed that if I have pull through that I should put a
Electronics Forum | Thu Mar 07 15:38:34 EST 2002 | kg
I can point to at least one recent study with contrary evidence that 60% of SMT problems are printing problems. The study is published in the APEX 2002 conference proceedings, a joint effort between Aglient and Nokia entitled 'Paste Inspection Study
Electronics Forum | Wed Aug 25 19:35:48 EDT 2004 | russ
This is highly dependent upon your board, vision inspection, part rotation, part type, layout, number of P/Ns per (1 pers or 100 pers) feeder layout, optimization, nozzle changes, etc... all have significant impact on placement speed. I find if you
Electronics Forum | Tue Nov 06 06:23:31 EST 2007 | clampron
Good Morning Roger, The Mirtec's can be adjusted to lower your false call rate. This can be done by reducing the matching percentage for each componnent but the result of this action is that the machine becomes less selective. If you lower them too
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