Electronics Forum: surface (Page 254 of 353)

DPAK drop @Second reflow

Electronics Forum | Thu Jun 02 14:57:36 EDT 2011 | davef

We don't expect properly soldered first-side DPAKs to fall from the board during second-side reflow. The ratio of weight to solder surface area for a DPAK is 1.32 gm per in^2, which is well within the limit of 44 gm per in^2. [Search the fine SMTnet

CAD Export issue: S.O.S

Electronics Forum | Tue Jun 07 20:56:47 EDT 2011 | aoiguy

Any and all input will be greatly appreciated. So here it goes. I'm having an issue where the cad I'm getting from customers is referencing pin 1 as the parts placement. This isn't an issue for surface mount, however the aoi machine that we have in

Siemens triple track 8mm feeders

Electronics Forum | Tue Jun 28 20:35:16 EDT 2011 | smellew

Hi you can buy the motors individually direct from Siemens or others suppliers like ourselves SME(Surface Mount Engineering)also many other uk & EU dealers(STM, Adopt, AMS,ISS & CPS, just search you'll find them plus many china suppliers, (Left side

SMT Design Issues for 2225 Capacitors in High Power RF

Electronics Forum | Mon Aug 08 16:14:36 EDT 2011 | wmburke

We are building a plasma diagnostic to monitor MHD phenomena in tokamak. As part of the development, we need high-voltage, high-power RF capacitors to tune and match an inductive load. This application is similar to a small induction heater, with t

BGA underfill

Electronics Forum | Thu Sep 22 14:54:01 EDT 2011 | hegemon

You might find a lot of experience in the forum here, but maybe not so many consultants for this niche. BGA underfill is not rocket science, and in my opinion, the key items are the material chracteristics, and the dispensing method and pattern. Fo

How to define solder paste printing height tolerance

Electronics Forum | Mon May 07 16:07:05 EDT 2012 | davef

Start with targets based on the stencil thickness (for height) and stencil thickness times the aperture size (for volume). * Set reasonable upper and lower control limits (+ 25% and –25 % of the targets, for example). * Next, check the printer set-u

Acceptance Criteria Ion Chromatography testing?

Electronics Forum | Thu May 31 21:45:48 EDT 2012 | davef

rsthompson ... if you're talking about bare boards IPC-5701, Users Guide for Cleanliness of Unpopulated PBC, Table 8 ||Bare board final surface finish Ions||Hot air solder level||OSP over copper||Gold over nickel Chloride||0.75 ug/cm^2||0.75 ug/cm^2

Probe Mark during ICT

Electronics Forum | Mon Jun 04 10:40:37 EDT 2012 | davef

I'm not aware of any such stipulation about witness [probe] marks for assembled boards, per se. Certainly, witness marks should not affect the intended performance of the assembly, you know, like damaging the solder connection or smudging solder mate

Probe Mark during ICT

Electronics Forum | Mon Jun 04 23:52:57 EDT 2012 | rway

Actually, if you experience lack of witness marks, you probably have a problem. Witness marks are OK and will not affect your assembly. I assume this is an SMT assembly we are talking about, in which case, this is what your test pads are for. You

Soldermask - sulfur presence

Electronics Forum | Mon Jun 25 03:52:24 EDT 2012 | awtm

Our Customer had detected tarnished pad on ImAg PCBA and had conducted several SEM-EDX test at the soldermask below some of the chip resistors. High concentration of sulfur was found and it can be significantly reduced after further chemical cleaned


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Surface Mount Technology Association (SMTA)
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