Electronics Forum | Fri Oct 30 15:09:44 EST 1998 | ChungPark
| Dear all, | | What are your views on reworking BGA's? I mean, with the BGA going through reflow temperatures four times or more, and with a manual reballing process, wouldn't it raise up a few reliability issues? Would you consider not doing rew
Electronics Forum | Fri Apr 10 20:27:07 EDT 1998 | Jean-Paul Clech
| I am currently involved in a reliability project related to SMT QFP and TSSOP fine pitch solder joint reliability. I have decided to use a temp chamber for stress testing. Is there a test standard that covers this? I am also a bit unsre as to wheth
Electronics Forum | Sun Apr 11 11:39:52 EDT 2010 | manchella
When we have sent some of motherboards for reliability testing in a tird party laoratory. It is found that when Dye&Pry is done after 600 cycles of Thermal Cycling, in LGA socket only one of the corner solder joing had 100% type 3 crack. All other so
Electronics Forum | Thu Jun 25 18:28:23 EDT 1998 | Earl Moon
| Looking for articles/data comparing the quality/reliability of mass | reflowed SMT solderjoints versus hand soldered SMT solderjoints. As solder joint quality most often is subjective - that is visually compared with graphic examples, IPC is the B
Electronics Forum | Thu Jul 28 09:23:48 EDT 2005 | fctassembly
300 million boards to date). I also have some reliability data for joints made with these 2 alloys wave soldered and then repaired with both. All of these results look good. The issue we see is mixing SN63 with any of the lead free alloys. Sn63 wave
Electronics Forum | Thu Mar 22 16:35:06 EST 2001 | Steve
Deja vu! When I read your response I turned around to see if you standing behind me listening to our problem. We currently make about 50 different boards all using no-clean that have no problems, yet this newest boards has a couple of issues that eng
Electronics Forum | Fri Jan 15 13:35:03 EST 1999 | Terry Burnette
| I saw the problem of void in solder bump or in lead less component or some BGA. But I didn't have standard specification of that void is accept or reject? Do any body have the better idea or suggestion of the criteria ? | | Thank you, | Wirat
Electronics Forum | Fri Aug 06 10:27:05 EDT 1999 | Kenneth Hedman
| | I saw the problem of void in solder bump or in lead less component or some BGA. But I didn't have standard specification of that void is accept or reject? Do any body have the better idea or suggestion of the criteria ? | | | | Thank you, |
Electronics Forum | Wed Jan 30 06:45:01 EST 2002 | yaq
Hi, Has anyone done some research (measurement/simulation) on the effect of PWB vias on solder ball temperature of the component? Would this have some effect on solder joint reliability especially during power cycling? Any comments will be appreciat
Electronics Forum | Thu Jan 31 04:48:04 EST 2002 | yaq
Hi, Has anyone done some research (measurement/simulation) on the effect of PWB vias on solder ball temperature of the component? Would this have some effect on solder joint reliability especially during power cycling? Any comments will be appreciat
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