Electronics Forum | Wed Feb 01 18:11:43 EST 2006 | Chris
I wonder if they are concerned about getting chemicals trapped in the tented vias. If the tented vias have pin hole openings or even larger openings, chemicals from the ENIG process could become entrapped in the via holes and not washed away in the
Electronics Forum | Tue Jan 31 15:44:08 EST 2006 | John S.
We're looking at lead free surface finishes for some of our products. On one supplier's site, I found a note that tenting vias on ENIG boards can lead to the black pad phenomenon. How does this compare to your design guidelines and experience? Than
Electronics Forum | Wed Feb 01 14:31:03 EST 2006 | John S.
http://www.saturnelectronics.com/docs/Getting_the_Lead_Out.pdf This is a document provided by one of our suppliers discussing lead free PCB considerations. Within the document, it mentions black pad being associated with tented vias. Thanks John S.
Electronics Forum | Wed Sep 27 12:44:52 EDT 2000 | Ashok Dhawan
What could be possible resons for " Plating Crack on Barrel (tented via)" This tented via is in proximity to parts being hand soldered. The crack in barrel was detected on failure analysis - micro-section of via where barrel is having crack ( circul
Electronics Forum | Fri Jun 09 17:34:08 EDT 2000 | Melanie Mulcahy
I need some information regarding the acceptability/unacceptability of using tented vias with LPI soldermask. Long story on all involved, but basically I have a board that I have had manufactured with no problems which has BGA/uBGA parts, tented via
Electronics Forum | Fri Oct 05 07:31:29 EDT 2001 | furrer
When tenting vias almost a few vias are not covered completly by Solder Mask. Does this one side open vias affect the Immersion Tin Process ? Do we get chemical residues in the vias ?
Electronics Forum | Tue Aug 18 10:18:22 EDT 1998 | Dave Hulbert
I have a question on tenting of vias on PWB's. I have designed a 6 >layer, military, mixed components (all on top side), LPI soldermask >board which will be run over the wave. I was planning on tenting vias >but did not specifically specify that on f
Electronics Forum | Mon Aug 31 14:03:41 EDT 1998 | Bill Childs
I have a question on tenting of vias on PWB's. I have designed a 6 | >layer, military, mixed components (all on top side), LPI soldermask | >board which will be run over the wave. I was planning on tenting vias | >but did not specifically specify tha
Electronics Forum | Thu Feb 21 11:43:09 EST 2008 | dphilbrick
I asume you're not ICT-ing this board and using the vias for test points?
Electronics Forum | Mon Feb 06 10:02:14 EST 2006 | Yash Sutariya
Sorry. I actually should clarify those slides. Black pad is not associated with tented vias. Also, you can tent vias with soldermask, but this requires the immersion gold process to be completed prior to soldermask. As such, all copper features (
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