Electronics Forum | Mon Feb 23 14:44:08 EST 2009 | sunny
Are boards produced using Vapor phase ovens dirtier than N2 Reflow oven. Are there any studies/papers someone can point to? if not what are the methods to verify this? is IPC specified SIR test using 24B SIR test coupons? please advise. thanks in adv
Electronics Forum | Mon Feb 05 10:12:32 EST 2007 | slthomas
The use of booties isn't required per se, just considered a standard step necessary to reach the 10,000 target. You also need to vacuum (central vac system, NOT exhausting into the room) daily, mop weekly, have a one piece floor, blah, blah, blah....
Electronics Forum | Mon Apr 23 17:30:08 EDT 2001 | davef
Step 1: Print paste on the board, skip placement, reflow the board, check solderability. Step 2: Goto Step 1. White Tin Solderability: The most common reason for solderability issues with the white tin surface coating during multiple thermal excur
Electronics Forum | Fri Oct 08 21:21:21 EDT 1999 | John
Although I can specify it, is ther a way I can test in test (in house)to be sure it's as specified? I don't need it now. I'm thinking of when I will need it. Thanks, John | | Hi, | | | | Does anybody know what is the minimum gold plating thickn
Electronics Forum | Mon Apr 23 19:12:23 EDT 2001 | relensky
Thanks for the instructions. I was missing the reflow part... Omikron is the method our board house offers. We have been through the plating thickness problem and tin depletion conditions. Beyond those issues, I have been trying a few different n
Electronics Forum | Mon Mar 12 08:00:14 EDT 2007 | rgduval
It sounds like you may be thinking of two different test methodologies. What is required? Bare-bard testing, to verify pcb fabrication? Or populated board testing, to verify manufacturing? If it's bare board testing, the fab house should advise a
Electronics Forum | Sun Oct 04 20:55:44 EDT 2009 | phomann
Hi, I have a test pcb that came with my Yamaha YM84S machine. The board contains land patterns, fiducials, etc. The pyrpose of the board is to test the placement and vision systems in the machine. Does anyone provide the technical drawing of the bo
Electronics Forum | Sun Nov 01 23:42:35 EST 2009 | vinitverma
Hi Peter, Just send me the scanned copy of the board and I'll send you the complete data. Regards Vinit
Electronics Forum | Wed Jul 15 05:36:34 EDT 1998 | Stoney Tsai
Bare board solderability plays a significant role of forming good solder joint. Currently, I can not find any information about bare board solderability testing procedure or methods. I think the procedure of testing should have some differentiations
Electronics Forum | Sat Nov 13 03:10:36 EST 2021 | pti88
why poor contact between PCBA board and probe？ When I used ICT to test PCBA board, there was poor contact between board and probe .
