Electronics Forum: test points (Page 1 of 60)

ATE/ICT testing of OSP test points

Electronics Forum | Fri Aug 20 00:11:05 EDT 1999 | Rick Holmes

Anyone out there using OSP with double sided reflow and selective solder pallets? I am having trouble testing through what is left of the Entek Plus on the test pads.

Re: ATE/ICT testing of OSP test points

Electronics Forum | Fri Aug 20 05:17:25 EDT 1999 | Earl Moon

| Anyone out there using OSP with double sided reflow and selective solder pallets? I am having trouble testing through what is left of the Entek Plus on the test pads. | Think rotary. Earl Moon

delamination test

Electronics Forum | Tue Aug 23 13:03:14 EDT 2005 | davef

What's the point of such a test? * If you are operating a board in an environment that keeps the board at a temperature that is close to causing delamination, why not design a board that can tolerate such an operating environment, rather than contin

Contamination test

Electronics Forum | Sun Jul 29 21:33:30 EDT 2001 | CAL

Your Ionograph and Zero-ion Values are set by you. There is no raw pass of fail criteria only the limits you set up. Ionograph is great for bare board resistivity (salt) test just as a pass fail for incoming inspection but this is all per your facto

Cleanliness test

Electronics Forum | Fri Jan 03 12:12:22 EST 2003 | richard

Good day and thanks for your comments Mike, What did I understood from your notes� 1) ROSE test (�extracting solution�) is probably good enough (with good equipment) to penetrate the space under my micro BGA. 2) I should test 2 parallel batches of

via as test point

Electronics Forum | Mon Feb 26 12:26:43 EST 2001 | CAM

I'm working a problem and looking for your input. Here the deal: Two sided mix technology board. Test is using unmasked via points on bottom for test points. Our fab drawing states tent via points on top side. First set of board came in with no tenti

via as test point

Electronics Forum | Mon Feb 26 20:02:42 EST 2001 | davef

First, I don�t understand why your board fabricator can�t do a good job plugging your vias. Additionally, when you consider that they forgot to plug the first batch of boards, it makes me wonder if they are desirable as a supplier. Generally, we us

BGA Pull test

Electronics Forum | Tue Oct 26 08:41:56 EDT 2004 | Bob R.

When we first got into BGAs on ENIG we were getting joint cracking at in-circuit test. The joints were breaking in the Sn-Ni intermetallic. We did a lot of pull testing while working with our board suppliers and our conclusion was that pull testing

BGA Pull test

Electronics Forum | Mon Oct 25 21:49:14 EDT 2004 | davef

First, any results of pull or shear tests are unscientific at best. [We pop our BGA from boards with, appropriately enough, a beverage can opener.] Second, we have no have problems with your ENIG specification. Third, as with your customer, we'd e

BGA failure when chamber test

Electronics Forum | Mon Mar 21 02:41:29 EDT 2011 | kemasta

Hi It's me again. Our products need to pass a chamber test 45c/36hrs after the PCBA completed batch of functional tests and assemble in to case. We found 1 unit was functioning for 24hours in the chamber, but hang after that. We tried to re-boot the

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