Electronics Forum | Fri Jan 30 14:20:55 EST 2009 | scottp
I do a lot of thermal cycle testing of new components for my company and often when I lay out a test board I'm trying to simulate 4 or 6 layer boards but I don't need them for routing so I just use a solid fill of a cross-hatch pattern. I've done it
Electronics Forum | Thu Apr 23 07:51:45 EDT 2009 | scottp
Every paper I've seen published shows that BGA voids either have no effect or actually give a slight improvement. The one exception are voids with a root cause in bad incoming boards, such as champagne voiding where nearly the entire interface is go
Electronics Forum | Thu May 14 22:45:46 EDT 2009 | davef
You're correct. It's a peculiar looking defect. With measling, we expect to see discrete white spots or crosses just below the surface of the base material. We don't see that here. We do see a similar condition at almost every PTH in the picture, a
Electronics Forum | Wed Jun 30 12:41:25 EDT 2010 | rgduval
In general, if the process has been consistent for a period of time, then one should look at any new variables in the process. Therefore...the supposition that there's a bad lot of components is a very good one. Did Yageo offer any possible explana
Electronics Forum | Wed Jul 07 11:02:07 EDT 2010 | davef
Rob gave you very good analysis and suggestions for troubleshooting your non-wetting issue. We agree with his sequence of troubleshooting. The following comments are meant to be a line to supplement Rob's plan of attack. This adds to Rob's comment
Electronics Forum | Thu Mar 28 13:19:14 EDT 2019 | davef
There is no industry standard for BTC stand-off height. "IPC-7093A Design and Assembly Process Implementation for Bottom Termination SMT (BTC) Components" just finished "Final Draft for Industry Review" in December 2018. It mentions stand-off height
Electronics Forum | Wed May 06 09:16:51 EDT 1998 | justin medernach
| I hear that there is a problem with using ceramic parts that are sizeable. Apparently, there is a mismatch in the Temperature Coefficient of Expansion between the FR4 and ceramic materials which causes the soldered erminations to weaken and eventua
Electronics Forum | Tue Mar 04 07:23:15 EST 2003 | msivigny
Hello ricardof, To implement Cpk studies on SMT production equipment, you will require highly accurate glass plates, glass component slugs, accurately manufactured stencils and a measurement system to perform X, Y and Theta positional deviations from
Electronics Forum | Thu May 21 09:54:07 EDT 1998 | Justin Medernach
| I'm reviewing my board fab spec. It calls for a minimum SnPb thickness of 50 microinches on HASL PWB's. I've looked at other specs that call out anything from 30 to 80 microinches, and others that just say the copper pad must be covered and solde
Electronics Forum | Tue May 26 14:50:07 EDT 1998 | Dave F
| | I'm reviewing my board fab spec. It calls for a minimum SnPb thickness of 50 microinches on HASL PWB's. I've looked at other specs that call out anything from 30 to 80 microinches, and others that just say the copper pad must be covered and sol
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