Electronics Forum: trend (Page 10 of 18)

Re: Process Characterisation

Electronics Forum | Thu Nov 30 13:51:33 EST 2000 | Michael Parker

Thanks for the details. Next question- where is your first time pass rate measured? Is this at test? Do you have inspection gates at the end of each process step? To get to the root cause, you need the earliest detection. Collect attribute data by a

Re: BGA faults

Electronics Forum | Thu Aug 17 08:44:14 EDT 2000 | Wolfgang Busko

Hi Jaqueline, my first thought goes into the same direction, twist or warp (either the board or the BGA itself). I don�t know the SRT equipment. I�ve noticed with our equipment using a spot underheat element caused some warpage of the PCB making it

No-Clean or water

Electronics Forum | Sat Jun 09 14:28:58 EDT 2001 | Kelvin

No-clean solder paste is definately a trend for tomorrow. However, there are several points you need to consider before you shift from WS to no-clean: 1. Component quality - No-clean solder paste generally (not essentially) get a lower avtivity than

Re: CPk

Electronics Forum | Mon Dec 06 13:32:47 EST 1999 | Bob Smith

CPk is a measure of the process variance with respect to the acceptable upper and lower limits. In your case it would be the accuracy of placement. The exact position of a chip ideally would be dead centre on the pads however in real life that positi

Assembly of CSP on pads with vias.

Electronics Forum | Sat Jan 23 09:36:35 EST 1999 | Parvez Patel

Hi Everyone, We plan to build, for reliability/experimental/research purpose some CSPs (namely Tessera microBGA 46-I/O 0/75mm pitch and TI 64 I/O 0/8 mm pitch). the various factors that we plan to evaluate are the reliability and assembly concerns fo

Re: Component Packaging Trends

Electronics Forum | Fri Oct 16 16:11:52 EDT 1998 | Joe Belmonte

| | Hi Folks, | | As I travel our industry it seems to me the trend is to move from finner and finner pitch QFP's to array packages (BGA's, CSP's, etc.). Do you folks see the same trend? What is the finest pitch QFP package you have used in your proc

Re: SMT Market Share development

Electronics Forum | Fri Oct 09 16:39:20 EDT 1998 | Dave F

| I am looking for data on share of SMT components in the total components market. I would like to quote in a study on how many boards are manufactured completely in SMT and how many are in mixed technologies. I would like to show the developpement o

Wave SPC

Electronics Forum | Wed Sep 26 11:15:59 EDT 2001 | Hussman

What do you folks use for control on your wave solder process? Primarily after wave. I know there are a variety of "wave riders" that will assure proper wave solder parameters, but would like to know what down stream controls some are using. We ar

Wave SPC

Electronics Forum | Thu Sep 27 10:28:29 EDT 2001 | John S

It seems to depend on your situation. We're an OEM manufacturer and run the same products for extended periods of time. We monitor process indicators such as Dave listed, but we also monitor process defect trends. This is product specific of cours

Profiling board

Electronics Forum | Thu May 23 11:23:47 EDT 2002 | yngwie

Hi guys... Has anybody hv an experience with using a common or standard profile to reflow high mix brd ( say, low, medium and high )?. The reason for asking is that, we are running high mix low volume, and materials that were consigned is exactly as


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