Electronics Forum: under stencil (Page 2 of 44)

Void under QFN TI LMZ20502SILT

Electronics Forum | Thu Jul 26 04:26:59 EDT 2018 | Robl

Hi VChauhan, I'll preface this by saying I am no DaveF. Voiding can occur when the flux in the paste boils and vapourises, the expanding vapour needing somewhere to go displaces the paste. So... what we have done in the past: 1) Step the stencil d

Void under QFN TI LMZ20502SILT

Electronics Forum | Fri Jul 27 09:47:20 EDT 2018 | davef

Adding to Rob's suggestions ... One of the theories about voiding in thermal / ground pads of BTC is: Solder starts melting at the edge of the pad and moves inward towards the center of the solder mass. This traps flux volatilizes. So, there needs t

Re: Solder Beading under Cap...Need help

Electronics Forum | Fri Feb 11 08:51:45 EST 2000 | HMAL

Dear Masdi, Perhaps you should check again your screen print process. Small amounts of solder paste under stencil can cause your problems. This paste is from previous printed pcb. When printing next pcb this paste attachs to places that it doesn't

Re: Solder Beading under Cap...Need help

Electronics Forum | Fri Feb 11 09:48:56 EST 2000 | Christopher Lampron

Dear Masdi, Solder beading (as opposed to solder balls) is usually caused by volume of solder paste, displacement of solder paste when component is placed and sometimes the proximity of the solder depositions for that component. Basically, a small a

Re: Solder Beading under Cap...Need help

Electronics Forum | Wed Feb 16 09:19:22 EST 2000 | MARK ALDER

Please check Circuit Assembly March 1998, article "Solder balls and aperture shapes" and August 1999 "Guiding stencil design". They can be contacted at www.circuitassembly.com The main cause of mid chip solder balls is the volume of paste that is p

via under a smd pad ?

Electronics Forum | Thu Nov 15 08:25:08 EST 2007 | rgduval

I do think that the designer goofed, and used too large vias. I believe he only used on size via on the entire board, regardless of whether it was in a pad, or out on the board. I have seen vias in pad work, though. From a manufacturing standpoint

Re: Solder under bottomside SMT components

Electronics Forum | Wed Jun 24 23:52:41 EDT 1998 | Phillip Hunter

| Has anyone seen a problem with solder under chip components, in-between the glue and the component or in-between the mask and the component? We seen both. | What could be causing this? This has only been detected on one of our products. All the re

Tenting via(s) under BGA & CSP?

Electronics Forum | Fri Apr 12 17:22:47 EDT 2002 | davef

First, splitting hairs on parlance. * Conformal Coating. A thin electrically nonconductive protective coating that conforms to the configuration of the covered assembly to provide environmental and mechanical protection. * Solder Mask. Coating mate

stencil design software

Electronics Forum | Fri May 17 14:12:17 EDT 2002 | dason_c

Not now, Valor may under develop the module for its Trilogy 5000 with the stencil aperture based on the rules which you set. Also, check with IRI stencil (Alpha), they have a s/w and based on using ODB++ file and not Gerber. Rgds.

0603 - stencil thickness

Electronics Forum | Thu Jan 09 10:58:30 EST 2003 | soupatech

Thanks for the input.... I ordered a 5 mil stencil AND used more tooling under the board. This gave me a much smaller deposit of solder. I wouldn't swear that was my problem but 96 boards later the problem is 99% gone. I believe there was just too mu


under stencil searches for Companies, Equipment, Machines, Suppliers & Information