Electronics Forum | Thu Sep 21 10:34:20 EDT 2006 | Kerwin Hooshey
Is there an ICT probe style that can pierce through tented (closed) via's?
Electronics Forum | Thu Feb 21 12:04:32 EST 2008 | pms
That is a correct assumption Doug.
Electronics Forum | Thu Feb 21 13:12:31 EST 2008 | dphilbrick
Just have your board house take them out of the mask layer.
Electronics Forum | Tue Mar 03 02:39:56 EST 2015 | sarason
I would presume you reflow the top of the board first. Use tented vias. As you have worked out, vias have surface tension, which sucks the solder up the hole during reflow of the bottom of the board. Good luck! regards sarason
Electronics Forum | Tue Mar 03 03:11:57 EST 2015 | vb7007
Hi I also forgot to mention, top side is reflowed first at SMT. Tenting vias is good option. we are looking into it. Can you please also suggest any solution to avoid solder balls at bottom side in other places than vias. Thanks
Electronics Forum | Tue Nov 27 14:24:13 EST 2001 | mparker
Short term fixes can be: have the vias "plugged" with solder by the fab house. This works if your fab is HASL finish. Tent the vias with solder mask, top side only. You may get a flux entrapment issue in the vias with this manner. Long term fix can
Electronics Forum | Sun Jan 09 19:37:15 EST 2005 | Bob R.
I'm just thinking out loud here with no experience to back it up, but I could see where you're trapping air or solvent filled voids inside the via by tenting from both sides. When you go through a heat cycle like reflow or wave solder you could be e
Electronics Forum | Wed Feb 20 16:52:11 EST 2008 | pms
Yea, I'm still here.....sigh. Got bridging problems. These assemblies are SMT topside, then go thru wave for thru-hole components on topside. These assemblies have many, many, many vias VERY close together. We have a problem with solder from the wa
Electronics Forum | Sun Dec 15 22:31:43 EST 2002 | craigj
Has anyone heard of vias cracking (barrel from pad) when being wave soldered. Was told this was a big problem by contract pcb designer, he always tent vias because of this. The reason was that the solder filling the vias caused stressing and then sep
Electronics Forum | Thu Apr 11 19:06:59 EDT 2002 | tmarc
We are using 1mm pitch BGAs with a great quantity of via(s) under the component. Very shortly we will be placing CSPs with .65mm pitch. Our via(s) are solder masked, however we generally have a percentage of them that the masking is thin enough that