Electronics Forum | Tue Dec 14 22:17:33 EST 1999 | Dave F
Armin: How ya doin� bud? CK gives good advice, but I'd like to take a bit of a different angle. Q1. For 0.7 mm (0.027in) diameter hole for vias, what�s the minimum annular ring for this hole diameter? Depends on what you�re trying to do. For in
Electronics Forum | Mon Dec 13 00:48:33 EST 1999 | armin
Hi All I have a 0.7 mm diameter hole for vias, what�s the minimum annular ring for this hole diameter? What�s the term unsupported and supported holes refer to in IPC-2221 9.1.2 Annular Ring Requirements? I have a proto-type PCB (designed by our R&
Electronics Forum | Thu Nov 25 21:43:49 EST 1999 | cklau
Via is normally a plated thru holes in (0.63 to 1.0 mm (0.025" to 0.040") diameter lands , which unless properly treated they must be located away from the component lands to prevent the solder migration off the component land during reflow soldering
Electronics Forum | Tue Jul 22 20:38:28 EDT 2003 | Paul T.
Have the PCB fabricator use a conductive paste to fill the vias and then finish by plateing over the via. Make sure it's coplanar to the side they're on, usually secondary side for discretes. PT
Electronics Forum | Fri Apr 19 08:19:26 EDT 2002 | jnunns
If the solder balls are next to your discretes, you should consider a homeplate design on you stencil apertures. THe only other time we have seen soler balls is due to the raw card. If the vias are not plugged by the solder mask, solder and air can g
Electronics Forum | Fri Oct 19 01:33:30 EDT 2001 | ianchan
Hi, Encountered this deference to the vapour phase process that was supposedly "phased" out years ago? *pardon the pun* Any comments from folks who have used this proces before? how about folks who are currently using this process? even better, a
Electronics Forum | Tue Nov 23 19:00:30 EST 1999 | armin
I've got a 100mm X 70 mm Dense PCB...The via holes used is 1.0 mm some are under SOIC's ...what problems that this type of via design poses ? all ideas are welcome ! thanks and regards, armin
Electronics Forum | Fri Mar 04 11:30:46 EST 2005 | Steve
Is anybody using via-in-pad under a BGA successfully? Is this a specialized capability, or do most board houses have the capability to do micro-via's? How small does the via need to be in order to avoid solder wicking? I understand that in order for
Electronics Forum | Sun Nov 28 20:30:51 EST 1999 | Greg H
What are the possible consequences when there's a flux entrapment (location: vias under components)under components during wave soldering? thanks
Electronics Forum | Tue Jul 18 13:52:42 EDT 2006 | SWAG
Could it be an unmasked via attached to the SMD pad under the part???
