Electronics Forum | Thu Jun 02 22:40:13 EDT 2016 | slouis2014
Hi, yes have a few experiments initially i tried to increase the solder volume but component pin have insufficient solder. 1. The solder coverage do you calculate it by solder volume or solder area. 2. if i would achieve as you recommend 50-60 % woul
Electronics Forum | Fri Jun 20 03:47:24 EDT 2008 | philip
Hi all, any good recommendation for PbF paste application to reduce voids underneath the QFN thermal pad (stencil thickenss? opening? via hole? reflow profile etc)? We have tried few stencil opening design but no significant improvement as seen. Ther
Electronics Forum | Mon Oct 21 08:46:15 EDT 2002 | davef
60% ||||36% of ball area|| >36% ||Class2|| Accept|| Reject ||||45% of ball diameter|| >45% ||||20.25% of ball area|| >20.25% ||Class3|| Accept|| Reject ||||30% of ball diameter|| >30% ||||09% of ball area|| >09% II. Missing Ball: This is prohi
Electronics Forum | Mon Sep 30 09:26:04 EDT 2002 | itempea
Russ, first step would be to get IPC-7095 on BGAs. A few notes: There can be voids in solder balls, or at the solder joints to the BGA, or at the solder joints to the PCB. Various sources or reasons can be responsible for these voids. Voids can be
Electronics Forum | Fri Jun 20 18:32:55 EDT 2008 | hegemon
Back when I used to do a lot of these style devices we ran into the same problem you are describing. Use a pattern for the center pad area and keep the total coverage to about 68% of the pad area. Diagonal Stripes, tic tac toe, cloverleaf, dot array
Electronics Forum | Wed Feb 02 21:56:11 EST 2005 | davef
Based on X-ray imaging, IPC-7095 standard specifies three categories for void size for BGA solder joints. These categories are based on the percentage of joint cross sectional area occupied by the voided area. Class III Small: Void area is LT 9% Cla
Electronics Forum | Wed Feb 13 12:44:05 EST 2008 | ck_the_flip
Larry, from my days of working for a Telecom. company, Bellcore standards (now Telcordia) was our BGA Void guideline. There was some verbiage in the guideline that accounted for allowable VOID VOLUME ...keep in mind, VOID AREA and volume are 2 diffe
Electronics Forum | Tue Apr 13 09:46:39 EDT 2004 | davef
Now, that's different. We misunderstood the problem from your original descrtiption. We thought the voids were showing at the via in the pad. Now, we understand the voids appear to be in the solder balls. Suggestions are: * Search the SMTnet Arch
Electronics Forum | Fri Dec 11 15:53:50 EST 2009 | smt_guy
Hi All, I have a PCB that is bonded on an aluminum plate. The size of PCB is 11" x 8" and 0.065" Thick, The aluminum plate has the same size and thickness as the PCB. Process is Lead Free. Questions: Is it possible and achieveable to bond the PC
Electronics Forum | Mon Jan 17 18:36:26 EST 2000 | William
Voids can be acceptable @ 24% per 5 balls area, and 8% per single ball area. In fact, Proceeding Book 1996; Vol. I, Page #126 conclusions saids: that solder joint voiding at the maximun levels pbserved in this study (were voided area was up to 24 per
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