Electronics Forum | Mon Dec 22 19:43:43 EST 2003 | Dean
I have seen this affect on Immersion Tin and OSP. 70 to 90 % of the solder wicks to the lead and forms a "single" homogenous solder mass. This even though the pad was 100 % covered with paste... Evaluated different solder paste...did find variatio
Electronics Forum | Mon Mar 01 09:17:56 EST 2010 | duso02
Hey....I think it might be the silicone adhesive! LOL Yeah, that'll do it. We use simple Shercon paper dots. Work like a charm. No evidence of "de-wetting".
Electronics Forum | Thu Jun 01 08:39:36 EDT 2006 | russ
IPC a 610 has this info. An 0402 however mat require more solder than what IPC states (basically evidence of wetted fillet for class2). more paste = more flux = better wetting. Why don't you tell us what pad sizes and layout you have and stencil t
Electronics Forum | Mon Nov 30 14:29:46 EST 2020 | kylehunter
Hi all. A recent board has shown some issues with graping and non-wetting on some 0402 capacitors. I believe we have the issue sorted. A combination of a 4 mil stencil with 2 mil reduction not giving us enough paste, and too long of a soak profile.
Electronics Forum | Tue Dec 04 09:48:43 EST 2001 | davef
Defining the thickness of solder between the lead and the pad, J-001 states "Properly wetted fillet shall be evident." J-001 is available from http://www.ipc.org. Factors that affect this are: * Amount and composition of solder * Amount and compo
Electronics Forum | Tue Oct 14 23:30:38 EDT 2003 | Dean
Get high magnifiction micro structure analysis of the failed joints. I bet you will see the correct grain structure. What about the other part types? Any failures? I assume this is standard 63/37 Eutectic solder? These aren't heart monitors or
Electronics Forum | Mon Apr 14 14:11:30 EDT 2008 | cyber_wolf
I dont know if this is related, but there appears to be a blister/measle in the upper right corner of the Q19 large pad. (upper right of Q19 as you are facing the photo) If your profile and paste is good, my bet would be that there is something wron
Electronics Forum | Mon Jul 31 03:50:26 EDT 2023 | calebcsmt
Is below the correct interpretation of IPC 610/JSTD requirements for FLAT LUG LEADS (seen on USBs and Diodes mainly) For class 1 or 2, no toe wetting would be required as minimum side joint is only 'evident wetting' and no actual length or fillet he
Electronics Forum | Mon Aug 24 21:16:57 EDT 2020 | smith88
I am trying to teach a class and the question came up about loss of metalization of the Earth pad on a chip filter. This pad is on the side of the component. I can not find a IPC call out for this type of side termination other than 3 or 5 sided 9.1.
Electronics Forum | Thu Dec 16 11:54:45 EST 1999 | Mike Naddra
At reflow an inert atmosphere is used to mitigate the occurance of oxidation, to me the decision weather to move from an inert atmosphere is based on several things ; PCB surface finish - are you using a HASL finish, OSP or another surface finish and
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