Technical Library | 2023-08-16 18:16:05.0
A global aerospace and defense leader requested a capability test of small volume solder paste dispensing on FR4 circuit boards.
Technical Library | 2023-07-22 02:26:05.0
Patch offset; Uneven patches throughout the substrate (each substrate is offset in a different way); Only part of the substrate is offset; Only certain components are offset; The patch Angle is offset; Component absorption error; Laser identification (component identification) error; Nozzle loading and unloading error; Mark (BOC mark, IC mark) identification error; Image recognition error (KE-2060 only); Analysis of the main reasons for throwing material. More information about KINGSUN please Contact US at jenny@ksunsmt.com or visit www.ksunsmt.com
Technical Library | 2023-09-16 06:11:05.0
Explore our range of selective wave soldering machines to enhance your PCB assembly process. Achieve precise soldering and superior quality for your electronics manufacturing needs.
Technical Library | 2023-09-18 03:50:05.0
Experience flawless PCB soldering with our cutting-edge on-line selective wave soldering machine. Boost efficiency and precision in electronic assembly. Explore our advanced solutions now!
Technical Library | 2024-11-04 16:14:05.0
The factors involved that effect the cost of laser cutting polyimide.
Technical Library | 2012-12-13 21:20:05.0
First published in the 2012 IPC APEX EXPO technical conference proceedings. We investigated the micro-void formation of solder joints after reliability tests such as preconditioning (precon) and thermal cycle (TC) by varying the thickness of Palladium (Pd) in Electroless Nickel / Electroless Palladium / Immersion Gold (ENEPIG) surface finish. We used lead-free solder of Sn-1.2Ag-0.5Cu-Ni (LF35). We found multiple micro-voids of less than 10 µm line up within or above the intermetallic compound (IMC) layer. The number of micro-voids increased with the palladium (Pd) layer thickness. Our results revealed that the micro-void formation should be related to (Pd, Ni)Sn4 phase resulted from thick Pd layer. We propose that micro-voids may form due to either entrapping of volatile gas by (Pd, Ni)Sn4 or creeping of (Pd, Ni)Sn4.
Technical Library | 2000-06-27 10:27:05.0
This paper shall discuss the appropriate guidelines and troubleshooting methods for reflow profiling, and in particular shall focus upon the benefits of implementing the linear ramp-to-spike profile.
Technical Library | 2019-12-30 02:11:05.0
(ROHS, Halogen Free & Reach Compliance) FR-4 (Tg130-180): ShengYi, ITEQ, KB, Huazheng High Speed FR4, Ceramics & Telflon, Rogers
Technical Library | 2011-05-12 19:04:05.0
We clarify the role of signal loss measurements, aka Total Loss, in specifying and qualifying circuit board materials for high-speed electronic design. We then demonstrate the NIST Multiline measurement technique in particular by characterizing test line
Technical Library | 2012-08-16 22:38:05.0
First published in the 2012 IPC APEX EXPO technical conference proceedings. The physical mechanisms behind tin whisker formation in pure tin (Sn) films continue to elude the microelectronics industry. Despite modest advances in whisker mitigation techniqu
