Technical Library | 2023-11-20 18:10:20.0
The electronics production is prone to a multitude of possible failures along the production process. Therefore, the manufacturing process of surface-mounted electronics devices (SMD) includes visual quality inspection processes for defect detection. The detection of certain error patterns like solder voids and head in pillow defects require radioscopic inspection. These high-end inspection machines, like the X-ray inspection, rely on static checking routines, programmed manually by the expert user of the machine, to verify the quality. The utilization of the implicit knowledge of domain expert(s), based on soldering guidelines, allows the evaluation of the quality. The distinctive dependence on the individual qualification significantly influences false call rates of the inbuilt computer vision routines. In this contribution, we present a novel framework for the automatic solder joint classification based on Convolutional Neural Networks (CNN), flexibly reclassifying insufficient X-ray inspection results. We utilize existing deep learning network architectures for a region of interest detection on 2D grayscale images. The comparison with product-related meta-data ensures the presence of relevant areas and results in a subsequent classification based on a CNN. Subsequent data augmentation ensures sufficient input features. The results indicate a significant reduction of the false call rate compared to commercial X-ray machines, combined with reduced product-related optimization iterations.
Technical Library | 2020-03-19 00:23:15.0
In this study, the question was how to perform statistically reliable robust- ness tests for the non-contact drop-on-demand printing of functional fluids, such as solder paste and conductive adhesives. The goal of this study was to develop a general method for hypothesis testing when robustness tests are performed. The main problem was to determine if there was a statistical difference between two means or proportions of jet printing devices. In this study, an example of jetting quality variation was used when comparing two jet printing ejector types that differ slightly in design. We wanted to understand if the difference in ejector design can impact jetting quality by performing robustness tests. and thus answer the question, "Can jetting differences be seen between ejector design 1 and design 2"?
Technical Library | 2020-10-27 02:07:31.0
For companies that choose to take the Pb-free exemption under the European Union's RoHS Directive and continue to manufacture tin-lead (Sn-Pb) electronic products, there is a growing concern about the lack of Sn-Pb ball grid array (BGA) components. Many companies are compelled to use the Pb-free Sn-Ag-Cu (SAC) BGA components in a Sn-Pb process, for which the assembly process and solder joint reliability have not yet been fully characterized. A careful experimental investigation was undertaken to evaluate the reliability of solder joints of SAC BGA components formed using Sn-Pb solder paste. This evaluation specifically looked at the impact of package size, solder ball volume, printed circuit board (PCB) surface finish, time above liquidus and peak temperature on reliability. Four different BGA package sizes (ranging from 8 to 45 mm2) were selected with ball-to-ball pitch size ranging from 0.5mm to 1.27mm. Two different PCB finishes were used: electroless nickel immersion gold (ENIG) and organic solderability preservative (OSP) on copper. Four different profiles were developed with the maximum peak temperatures of 210oC and 215oC and time above liquidus ranging from 60 to 120 seconds using Sn-Pb paste. One profile was generated for a lead-free control. A total of 60 boards were assembled. Some of the boards were subjected to an as assembled analysis while others were subjected to an accelerated thermal cycling (ATC) test in the temperature range of -40oC to 125oC for a maximum of 3500 cycles in accordance with IPC 9701A standard. Weibull plots were created and failure analysis performed. Analysis of as-assembled solder joints revealed that for a time above liquidus of 120 seconds and below, the degree of mixing between the BGA SAC ball alloy and the Sn-Pb solder paste was less than 100 percent for packages with a ball pitch of 0.8mm or greater. Depending on package size, the peak reflow temperature was observed to have a significant impact on the solder joint microstructural homogeneity. The influence of reflow process parameters on solder joint reliability was clearly manifested in the Weibull plots. This paper provides a discussion of the impact of various profiles' characteristics on the extent of mixing between SAC and Sn-Pb solder alloys and the associated thermal cyclic fatigue performance.
Technical Library | 2023-07-25 16:50:02.0
Some of the new handheld communication devices offer real challenges to the paste printing process. Normally, there are very small devices like 01005 chip components as well as 0.3 mm pitch uBGA along with other devices that require higher deposits of solder paste. Surface mount connectors or RF shields with coplanarity issues fall into this category. Aperture sizes for the small devices require a stencil thickness in the 50 to 75 um (2-3 mils) range for effective paste transfer whereas the RF shield and SMT connector would like at least 150 um (6 mils) paste height. Spacing is too small to use normal step stencils. This paper will explore a different type of step stencil for this application; a "Two-Print Stencil Process" step stencil. Here is a brief description of a "Two-Print Stencil Process". A 50 to 75 um (2-3 mils) stencil is used to print solder paste for the 01005, 0.3 mm pitch uBGA and other fine pitch components. While this paste is still wet a second in-line stencil printer is used to print all other components using a second thicker stencil. This second stencil has relief pockets on the contact side of the stencil any paste was printed with the first stencil. Design guidelines for minimum keep-out distances between the relief step, the fine pitch apertures, and the RF Shields apertures as well relief pocket height clearance of the paste printed by the first print stencil will be provided.
Technical Library | 2012-12-13 21:20:05.0
First published in the 2012 IPC APEX EXPO technical conference proceedings. We investigated the micro-void formation of solder joints after reliability tests such as preconditioning (precon) and thermal cycle (TC) by varying the thickness of Palladium (Pd) in Electroless Nickel / Electroless Palladium / Immersion Gold (ENEPIG) surface finish. We used lead-free solder of Sn-1.2Ag-0.5Cu-Ni (LF35). We found multiple micro-voids of less than 10 µm line up within or above the intermetallic compound (IMC) layer. The number of micro-voids increased with the palladium (Pd) layer thickness. Our results revealed that the micro-void formation should be related to (Pd, Ni)Sn4 phase resulted from thick Pd layer. We propose that micro-voids may form due to either entrapping of volatile gas by (Pd, Ni)Sn4 or creeping of (Pd, Ni)Sn4.
Technical Library | 2015-05-28 17:34:48.0
The printed circuit board assembly industry has long embraced the "Smaller, Lighter, Faster" mantra for electronic devices, especially in our ubiquitous mobile devices. As manufacturers increase smart phone functionality and capability, designers must adopt smaller components to facilitate high-density packaging. Measuring over 40% smaller than today's 0402M (0.4mmx0.2mm) microchip, the new 03015M (0.3mm×0.15mm) microchip epitomizes the bleeding-edge of surface mount component miniaturization. This presentation will explore board and component trends, and then delve into three critical areas for successful 03015M adoption: placement equipment, assembly materials, and process controls. Beyond machine requirements, the importance of taping specifications, component shape, solder fillet, spacing gap, and stencil design are explored. We will also examine how Adaptive Process Control can increase production yields and reduce defects by placing components to solder position rather than pad. Understanding the process considerations for 03015M component mounting today will help designers and manufacturers transition to successful placement tomorrow.
Technical Library | 2024-06-23 21:57:16.0
Two extremes of reflow time scale for copper pillar flip chip solder joints were explored in this study. Sn-2.5Ag solder capped pillars were joined to laminate substrates using either conventional forced convection reflow or the controlled impingement of a defocused infrared laser. The laser reflow joining process was accomplished with an order of magnitude reduction in time above liquidus and a similar increase in solidification cooling rate. The brief reflow time and rapid cooling of a laser impingement reflow necessarily affects all time and temperature dependent phenomena characteristic of reflowed molten solder. These include second phase precipitate dissolution, base metal (copper) dissolution, and the extent of surface wetting. This study examines the reflow dependent microstructural aspects of flip chip Sn-Ag joints on samples of two different size scales, the first with copper pillars of 70μm diameter on 120μm pitch and the second with 23μm diameter pillars on a 40μm pitch. The length scale of Pb-free solder joints is known to affect the Sn grain solidification structure; Sn grain morphology will be noted across both reflow time and joint length scales. Sn grain morphology was further found to be dependent on the extent of surface wetting when such wetting circumvented the copper diffusion barrier layer. Microstructural analysis also will include a comparison of intermetallic structures formed; including the size and number density of second phase Ag3Sn precipitates in the joint and the morphology and thickness of the interfacial intermetallics formed on the pillar and substrate surfaces.
Technical Library | 2021-10-20 18:21:06.0
The solderability of the SAC305 alloy in contact with printed circuit boards (PCB) having different surface finishes was examined using the wetting balance method. The study was performed at a temperature of 260 _C on three types of PCBs covered with (1) hot air solder leveling (HASL LF), (2) electroless nickel immersion gold (ENIG), and (3) organic surface protectant (OSP), organic finish, all on Cu substrates and two types of fluxes (EF2202 and RF800). The results showed that the PCB substrate surface finish has a strong effect on the value of both the wetting time t0 and the contact angle h. The shortest wetting time was noted for the OSP finish (t0 = 0.6 s with EF2202 flux and t0 = 0.98 s with RF800 flux), while the ENIG finish showed the longest wetting time (t0 = 1.36 s with EF2202 flux and t0 = 1.55 s with RF800 flux). The h values calculated from the wetting balance tests were as follows: the lowest h of 45_ was formed on HASL LF (EF2202 flux), the highest h of 63_ was noted on the OSP finish, while on the ENIG finish, it was 58_ (EF2202 flux). After the solderability tests, the interface characterization of cross-sectional samples was performed by means of scanning electron microscopy coupled with energy dispersive spectroscopy.
Technical Library | 2015-04-02 20:12:58.0
The demands on volume delivery and positioning accuracy for solder paste deposits are increasing as the size and complexity of circuits continue to develop in the electronics industry. According to the iNEMI 2013 placement accuracy for these kinds of components will reach 6 sigma placement accuracy in X and Y of 30 um by 2023.This study attempts to understand the dependencies on piezo actuation pulse profile on jetting deposit quality, especially focused on positioning, satellites and shape. The correlation of deposit diameter and positioning deviation as a function of piezo actuation profile shows that positioning error for deposits increase almost monotonically with decreasing droplet volume irrespective of the piezo-actuation profile. The trends for shape and satellite levels are not as clear and demand further study.
Technical Library | 2020-07-02 13:16:32.0
Principle of shielding 1 The principle of shielding is creating a conductive layer completely surrounding the object you want to shield. This was invented by Michael Faraday and this system is known as a Faraday Cage. 2 Ideally, the shielding layer will be made up of conductive sheets or layers of metal that are connected by means of welding or soldering, without any interruptions. The shielding is perfect when there is no difference in conductivity between the used materials. When dealing with frequencies below 30 MHz, the metal thickness affects shielding effectiveness. We also offer a range of shielding methods for plastic enclosures. A complete absence of interruptions is not a realistic goal since the Faraday cage will have to be opened from time to time so electronics, equipment or people can be moved in or out. Openings are also needed for displays, ventilation, cooling, power supply, signals etc. 3 Shielding works in both directions, items inside the shielded room are shielded from outside influences. (Fig. 3.1)
.gif)
winsouce.jpg)
