Technical Library | 2020-09-16 21:24:56.0
Additive manufacturing processes typically used for mechanical parts can be combined with enhanced technologies for electronics production to enable a highly flexible manufacturing of personalized 3D electronic devices. To illustrate different approaches for implementing electrical and electronic functionality, conductive paths and electronic components were embedded in a powder bed printed substrate using an enhanced 3D printer. In addition, a modified Aerosol Jet printing process and assembly technologies adapted from the technology of Molded Interconnect Devices were applied to print circuit patterns and to electrically interconnect components on the surface of the 3D substrates.
Institute for Factory Automation and Production Systems (FAPS)
Technical Library | 2020-07-02 13:29:37.0
Industry standards such as J-STD-005 and JIS Z 3284-1994 call for the use of viscosity measurement(s) as a quality assurance test method for solder paste. Almost all solder paste produced and sold use a viscosity range at a single shear rate as part of the pass-fail criteria for shipment and customer acceptance respectively. As had been reported many times, an estimated 80% of the defects associated with the surface mount technology process involve defects created during the printing process. Viscosity at a single shear rate could predict a fatal flaw in the printability of a solder paste sample. However, false positive single shear rate viscosity readings are not unknown.
Technical Library | 2020-04-16 05:52:45.0
Based on the dual pot, we developed an independent dual z-axis control dual pot for FLEX-i2! There are 5 operation modes available with the independent dual Z axis: only solder pot1, only solder pot2, first solder pot 1 then solder pot2, first solder pot2 then solder pot1, solder pot1 and solder pot2 together. In specific applications, solder pot1 can be selected with large nozzle soldering heat-absorbing large parts, solder pot2 use small nozzle soldering heat-absorbing small parts, so as to achieve both soldering effect and productivity. Also can use same nozzle, dual axis simultaneously solder two same plate to increase productivity. To get the maximum flexibility and productivity! FLEX-i2 is a compact in line selective soldering machine, equipped with high precision servo control system, jet valve, live-on camera, upper preheating etc, which can provide a high flexibility and efficiency soldering process. The maximum soldering size can reach 420mm*490mm!
Technical Library | 2020-10-08 01:01:01.0
Flexible hybrid electronics (FHE) is emerging as a promising solution to combine the benefits of printed electronics and silicon technology. FHE has many high-impact potential areas, such as wearable applications, health monitoring, and soft robotics, due to its physical advantages, which include light weight, low cost and the ability conform to different shapes. However, physical deformations in the field can lead to significant testing and validation challenges. For example, designers must ensure that FHE devices continue to meet their specs even when the components experience stress due to bending. Hence, physical deformation, which is hard to emulate, has to be part of the test procedures for FHE devices. This paper is the first to analyze stress experience at different parts of FHE devices under different bending conditions. We develop a novel methodology to maximize the test coverage with minimum number of text vectors with the help of a mixed integer linear programming formulation. We validate the proposed approach using an FHE prototype and COMSOL Multiphysics simulations
Technical Library | 2020-11-04 17:57:41.0
Residues present on circuit boards can cause leakage currents if not controlled and monitored. How "Clean is Clean" is neither easy nor cheap to determine. Most OEMs use analytical methods to assess the risk of harmful residues. The levels that can be associated with clean or dirty are typically determined based on the exposed environment where the part will be deployed. What is acceptably clean for one segment of the industry may be unacceptable for more demanding segments. As circuit assemblies increase in density, understanding cleanliness data becomes more challenging. The risk of premature failure or improper function is typically site specific. The problem is that most do not know how to measure or define cleanliness nor can they recognize process problems related to residues. A new site specific method has been designed to run performance qualifications on boards built with specific soldering materials, reflow settings and cleaning methods. High impedance measurements are performed on break off coupons designed with components geometries used to build the assembly. The test method provides a gauge of potential contamination sources coming from the assembly process that can contribute to electrochemical migration.
Technical Library | 2020-09-23 21:37:25.0
The need to minimise thermal damage to components and laminates, to reduce warpage-induced defects to BGA packages, and to save energy, is driving the electronics industry towards lower process temperatures. For soldering processes the only way that temperatures can be substantially reduced is by using solders with lower melting points. Because of constraints of toxicity, cost and performance, the number of alloys that can be used for electronics assembly is limited and the best prospects appear to be those based around the eutectic in the Bi-Sn system, which has a melting point of about 139°C. Experience so far indicates that such Bi-Sn alloys do not have the mechanical properties and microstructural stability necessary to deliver the reliability required for the mounting of BGA packages. Options for improving mechanical properties with alloying additions that do not also push the process temperature back over 200°C are limited. An alternative approach that maintains a low process temperature is to form a hybrid joint with a conventional solder ball reflowed with a Bi-Sn alloy paste. During reflow there is mixing of the ball and paste alloys but it has been found that to achieve the best reliability a proportion of the ball alloy has to be retained in the joint, particular in the part of the joint that is subjected to maximum shear stress in service, which is usually the area near the component side. The challenge is then to find a reproducible method for controlling the fraction of the joint thickness that remains as the original solder ball alloy. Empirical evidence indicates that for a particular combination of ball and paste alloys and reflow temperature the extent to which the ball alloy is consumed by mixing with the paste alloy is dependent on the volume of paste deposited on the pad. If this promising method of achieving lower process temperatures is to be implemented in mass production without compromising reliability it would be necessary to have a method of ensuring the optimum proportion of ball alloy left in the joint after reflow can be consistently maintained. In this paper the author explains how the volume of low melting point alloy paste that delivers the optimum proportion of retained ball alloy for a particular reflow temperature can be determined by reference to the phase diagrams of the ball and paste alloys. The example presented is based on the equilibrium phase diagram of the binary Bi-Sn system but the method could be applied to any combination of ball and paste alloys for which at least a partial phase diagram is available or could be easily determined.
Technical Library | 2020-07-08 20:05:59.0
There is a compelling need for functional testing of high-speed input/output signals on circuit boards ranging from 1 gigabit per second (Gbps) to several hundred Gbps. While manufacturing tests such as Automatic Optical Inspection (AOI) and In-Circuit Test (ICT) are useful in identifying catastrophic defects, most high-speed signals require more scrutiny for failure modes that arise due to high-speed conditions, such as jitter. Functional ATE is seldom fast enough to measure high-speed signals and interpret results automatically. Additionally, to measure these adverse effects it is necessary to have the tester connections very close to the unit under test (UUT) as lead wires connecting the instruments can distort the signal. The solution we describe here involves the use of a field programmable gate array (FPGA) to implement the test instrument called a synthetic instrument (SI). SIs can be designed using VHDL or Verilog descriptions and "synthesized" into an FPGA. A variety of general-purpose instruments, such as signal generators, voltmeters, waveform analyzers can thus be synthesized, but the FPGA approach need not be limited to instruments with traditional instrument equivalents. Rather, more complex and peculiar test functions that pertain to high-speed I/O applications, such as bit error rate tests, SerDes tests, even USB 3.0 (running at 5 Gbps) protocol tests can be programmed and synthesized within an FPGA. By using specific-purpose test mechanisms for high-speed I/O the test engineer can reduce test development time. The synthetic instruments as well as the tests themselves can find applications in several UUTs. In some cases, the same test can be reused without any alteration. For example, a USB 3.0 bus is ubiquitous, and a test aimed at fault detection and diagnoses can be used as part of the test of any UUT that uses this bus. Additionally, parts of the test set may be reused for testing another high-speed I/O. It is reasonable to utilize some of the test routines used in a USB 3.0 test, in the development of a USB 3.1 (running at 10 Gbps), even if the latter has substantial differences in protocol. Many of the SI developed for one protocol can be reused as is, while other SIs may need to undergo modifications before reuse. The modifications will likely take less time and effort than starting from scratch. This paper illustrates an example of high-speed I/O testing, generalizes failure modes that are likely to occur in high-speed I/O, and offers a strategy for testing them with SIs within FPGAs. This strategy offers several advantages besides reusability, including tester proximity to the UUT, test modularization, standardization approaching an ATE-agnostic test development process, overcoming physical limitations of general-purpose test instruments, and utilization of specific-purpose test instruments. Additionally, test instrument obsolescence can be overcome by upgrading to ever-faster and larger FPGAs without losing any previously developed design effort. With SIs and tests scalable and upward compatible, the test engineer need not start test development for high-speed I/O from scratch, which will substantially reduce time and effort.
Technical Library | 2020-05-28 02:19:28.0
Properly functioning printed circuit boards are essential for both manufacturers of electronic devices and also the developers if the overall intent is for the electronic device to function at high capacity. From designing the schematics of the printed circuit boards to testing the products, there is no process of PCB manufacturing and/or assembly that can be taken for granted. While it's true that you can attempt this process on your own, especially if you are in possession of a large scale manufacturing facility, here are a few reasons why it would be a better option to opt for a professional company for PCB manufacturing and assembly. 1. Variety A professional printed circuit boards manufacturing company will be able to offer you a huge variety. You will be able to choose from rigid, flexible, or rigid-flex. What's more, the PCBs will be customized as per the need of the application. 2. Quality Professional and good printed circuit board manufacturing and assembling companies might cost you just a little bit extra but they also guarantee to produce the best results and offer very high quality products. In the end, it is quality that will make the difference between mediocre and a high functioning PCB. 3. Cost Efficiency Since you don't have to waste time or resources on buying equipment to produce the best PCBs or hiring staff to oversee the process, you can actually end up saving money. You can even save on PCB assembly cost by hiring this job out. All you have to do is to negotiate the quote and sit back, relax, and wait for the PCBs to be delivered to you. 4. Eliminate Design Flaws Design engineers hired by PCB manufacturing and assembling companies use the best graphic software to develop and test the schematics of PCBs. This increases the chances of eliminating flaws in the printed circuit boards during the initial design phase. 5. Multilayer PCB Manufacturing and Assembly The process of manufacturing and assembling multilayer PCBs is as intricate as it sounds. All processes of manufacturing and assembling multilayer PCBs require the best machines and trained technicians to pass the quality and functionality tests. Manufacturing and assembling multilayer printed circuit boards yourself is going to cost you a lot. Even the smallest of mistakes during the manufacturing and assembling process might render the entire PCB entirely useless. 6. Save Time PCBs are just a single part of the electronic device. To complete the device, many more pieces would be needed. The manufacturers of the electronic device can hire out the job of manufacturing or assembling the PCBs, which will mean they will have one less chore to do. This, in turn, will save you a lot of time which could be spent on elevating the quality of the product. 7. Experience Experience makes all the difference. It is what makes the name of any company reliable in the market. Long experience of manufacturing and assembling printed circuit boards makes the company well versed in the process and it also makes it an expert to identify design, manufacturing, assembling, and testing needs of certain applications We, at Asia Pacific Circuits, offer these benefits and so much more. For quick turn PCB assembly, PCB manufacturing and PCB designing, you can contact us anytime.
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