Technical Library | 2019-05-29 01:47:22.0
1.Vias near SMD pads: Solder can flow into the via after melted. As a result cold joint will appear in the end. Check the picture below. 2.Vias on SMD pads: Solder can flow into the via more easier after melted. Check the picture below. 3.Via opening without soldermask covered. When workers solder TH parts by hand, soldering iron can touch vias sometime, then tiny amounts molten solder will stay on vias. This can lead to electrical short easily. We recommend you make all vias tenting (covered by solder mask) if it is possible.
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Technical Library | 2018-01-04 11:05:34.0
Traceability has grown from being a specialized need for certain safety critical segments of the industry, to now being a recognized value-add tool for the industry as a whole. The perception of traceability data collection however persists as being a burden that may provide value only when the most rare and disastrous of events take place. Disparate standards have evolved in the industry, mainly dictated by large OEM companies in the market create confusion, as a multitude of requirements and definitions proliferate. The intent of the IPC-1782 project is to bring the whole principle and perception of traceability up to date. Traceability, as defined in this standard will represent the most effective quality tool available, becoming an intrinsic part of best practice operations, with the encouragement of automated data collection from existing manufacturing systems, integrating quality, reliability, predictive (routine, preventative, and corrective) maintenance, throughput, manufacturing, engineering and supply-chain data, reducing cost of ownership as well as ensuring timeliness and accuracy all the way from a finished product back through to the initial materials and granular attributes about the processes along the way.
Technical Library | 2019-10-17 08:44:01.0
There has been an increase in sealing and encapsulation applications mainly in the field of autonomous driving. Safety and assistance systems already make driving safer and more comfortable today. With increasing progress even more electronic systems will be added. The smooth functioning of computers, sensors, cameras, etc. - and thus our safety as road users - also depends on optimally applied potting media. These can be applied economically, quickly and with high quality in individual applications and are now mastered. With the changing mobility concepts, however, the prerequisites in manufacturing are changing. The requirements are often not fixed at the outset, but only develop during the course of the project. The aim here is to generate a flexible standard that enables attractive pricing and short delivery times. However, we are prepared for these developments: with our modular system consisting of scalable system modules. From this, individual processes can be taken and combined according to requirements. Our new LiquiPrep systems have recently become part of this modular system. They represent a further development of the proven A310 product family and enable reliable processing and conveying of self-levelling media. In addition to a significantly more intuitive operation, the LiquiPrep systems also offer higher performance thanks to a new, patented membrane pump and an optimized agitator. Image: Optimally applied sealants and casting materials form the basis for high quality and smooth functioning of the components.
Technical Library | 2023-05-02 18:54:30.0
Surface-mount PCB components are smaller than their lead-based counterparts and provide a radically higher component density. They are available in a variety of shapes and sizes designated by a series of standardized codes curated by the electronics industry. Of these PCB components, the 0201-sized are the smallest, measuring 0.024 x 0.012 in. (0.6 x 0.3 mm) – that's 70% smaller than the previous 0402 level! The 0201 components are designed to improve reliability in space-constrained applications such as portable electronics like smartphones, tablets, robotics and digital cameras, but require delicate handling during the assembly process.
Technical Library | 2016-11-10 17:37:35.0
The demand for compute capability is growing rapidly fueling the ever rising consumption of power by data centers the worldwide. This growth in power consumption presents a challenge to data center total cost of ownership. Free-air cooling is one of the industrial trends in reducing power consumption, the power usage effectiveness (PUE) ratio, and the total cost of ownership (TCO). Free-air cooling is a viable approach in many parts of the world where the air is reasonably clean. In Eastern China, the poor quality of air, high in particle and gaseous contamination, is a major obstacle to free-air cooling. Servers exposed to outside air blowing in to data centers will corrode and fail at high rate. The poor reliability of hardware increase TCO dramatically. This paper describes a corrosion resistant server design suitable for reliable operation in a free-air cooling data center located in Eastern China where the indoor air quality can be as poor as ASHRAE (American Society of Heating, Refrigerating and Air-Conditioning Engineers) severity level G3. An accelerated corrosion test method of verifying hardware reliability in the ASHRAE severity level G3 environment is also described.
Technical Library | 2017-01-19 16:58:47.0
The biggest problem with designing rigid-flex hybrid PCBs is making sure everything will fold in the right way, while maintaining good flex-circuit stability and lifespan. The next big problem to solve is the conveyance of the design to a fabricator who will clearly understand the design intent and therefore produce exactly what the designer/engineer intended.Rigid-Flex circuit boards require additional cutting and lamination stages, and more exotic materials in manufacturing and therefore the cost of re-spins and failures are very much higher than traditional rigid boards. To reduce the risk and costs associated with rigid-flex design and prototyping, it is desirable to model the flexible parts of the circuit in 3D CAD to ensure correct form and fit. In addition it is necessary to provide absolutely clear documentation for manufacturing to the fabrication and assembly houses.
Technical Library | 2023-05-02 18:50:24.0
Surface-mount PCB components are smaller than their lead-based counterparts and provide a radically higher component density. They are available in a variety of shapes and sizes designated by a series of standardized codes curated by the electronics industry. Of these PCB components, the 0201-sized are the smallest, measuring 0.024 x 0.012 in. (0.6 x 0.3 mm) – that's 70% smaller than the previous 0402 level! The 0201 components are designed to improve reliability in space-constrained applications such as portable electronics like smartphones, tablets, robotics and digital cameras, but require delicate handling during the assembly process. Given the miniaturized dimensions of an 0201 package, it is crucial that the mounting process abide by a series of guidelines regarding the design of the PCB mounting pads and solderable metallization, PCB circuit trace width, solder paste selection, package placement and overages, solder paste reflow, solder stencil screening, and final inspection. It's advisable that one review this information when procuring the services of a PCB assembler.
Technical Library | 2021-07-20 20:02:29.0
During the manufacturing of printed circuit boards (PCBs) for a Flight Project, it was found that a European manufacturer was building its boards to a European standard that had no requirement for copper wrap on the vias. The amount of copper wrap that was measured on coupons from the panel containing the boards of interest was less than the amount specified in IPC-6012 Rev B, Class 3. To help determine the reliability and usability of the boards, three sets of tests and a simulation were run. The test results, along with results of simulation and destructive physical analysis, are presented in this paper. The first experiment involved subjecting coupons from the panels supplied by the European manufacturer to thermal cycling. After 17 000 cycles, the test was stopped with no failures. A second set of accelerated tests involved comparing the thermal fatigue life of test samples made from FR4 and polyimide with varying amounts of copper wrap. Again, the testing did not reveal any failures. The third test involved using interconnect stress test coupons with through-hole vias and blind vias that were subjected to elevated temperatures to accelerate fatigue failures. While there were failures, as expected, the failures were at barrel cracks. In addition to the experiments, this paper also discusses the results of finite-element analysis using simulation software that was used to model plated-through holes under thermal stress using a steady-state analysis, also showing the main failure mode was barrel cracking. The tests show that although copper wrap was sought as a better alternative to butt joints between barrel plating and copper foil layers, manufacturability remains challenging and attempts to meet the requirements often result in features that reduce the reliability of the boards. Experimental and simulation work discussed in this paper indicate that the standard requirements for copper wrap are not contributing to the overall board reliability, although it should be added that a design with a butt joint is going to be a higher risk than a reduced copper wrap design. The study further shows that procurement requirements for wrap plating thickness from Class 3 to Class 2 would pose little risk to reliability (minimum 5 μm/0.197 mil for all via types).Experimental results corroborated by modeling indicate that the stress maxima are internal to the barrels rather than at the wrap location. In fact, the existence of Cu wrap was determined to have no appreciable effect on reliability.
Technical Library | 2019-12-12 02:43:44.0
Today we discuss the reason that causes temperature humidity chamber to alarm,In most cases, the equipment alarm is caused by the improper operation in the process of use, which mainly includes following reasons:that are refrigeration system, temperature system and circulating system. First, Refrigeration system 1, refrigeration compressor overpressure alarm. If the refrigerant pressure exceeds the set value, it will stop and alarm at the same time. At this time, the fault must be eliminated and then manually reset. 2, short phase power supply, phase sequence alarm. When the external power supply of the equipment is out of phase or the phase sequence is changed, it will stop and alarm at the same time. 3. The circulating cooling water is short of water to alarm. When the water pressure of the cooling circulating water system is insufficient, it will stop and alarm at the same time, and it must wait for the fault to be eliminated and reset at the same time before it could run normally. 4, refrigeration compressor overheating alarm. When the coil of the compressor is overheated and the power supply of the line is not normal, it will stop and alarm at the same time. Second, Temperature system 1, the overtemperature alarm in the chamber. The sensors in the channel and the sample area are equipped with overtemperature protection devices, and there are also overtemperature protecter on the control panel. When the temperature in the working chamber exceeds the setting value on the controller, it will stop and alarm. 2. sample overtemperature protection. When the temperature in the sample area exceeds the protection temperature set by the controller, it will stop and alarm at the same time. The overtemperature protection of the sample is divided into upper limit protection and lower limit protection, which can be set according to the demand, Third,Circulating system 1. The alarm is caused by the overheating of the circulating fan. When the coil of the fan is over-heated, the alarm will be stopped at the same time. 2. The fan over-current alarm. When the current of the fan exceeds the allowable value, the alarm is stopped at the same time, and the normal operation can only be carried out after the fault maintenance of the overcurrent is completed. This is what we talk about today,if you have more questions,let us know.
Technical Library | 2020-07-08 20:05:59.0
There is a compelling need for functional testing of high-speed input/output signals on circuit boards ranging from 1 gigabit per second (Gbps) to several hundred Gbps. While manufacturing tests such as Automatic Optical Inspection (AOI) and In-Circuit Test (ICT) are useful in identifying catastrophic defects, most high-speed signals require more scrutiny for failure modes that arise due to high-speed conditions, such as jitter. Functional ATE is seldom fast enough to measure high-speed signals and interpret results automatically. Additionally, to measure these adverse effects it is necessary to have the tester connections very close to the unit under test (UUT) as lead wires connecting the instruments can distort the signal. The solution we describe here involves the use of a field programmable gate array (FPGA) to implement the test instrument called a synthetic instrument (SI). SIs can be designed using VHDL or Verilog descriptions and "synthesized" into an FPGA. A variety of general-purpose instruments, such as signal generators, voltmeters, waveform analyzers can thus be synthesized, but the FPGA approach need not be limited to instruments with traditional instrument equivalents. Rather, more complex and peculiar test functions that pertain to high-speed I/O applications, such as bit error rate tests, SerDes tests, even USB 3.0 (running at 5 Gbps) protocol tests can be programmed and synthesized within an FPGA. By using specific-purpose test mechanisms for high-speed I/O the test engineer can reduce test development time. The synthetic instruments as well as the tests themselves can find applications in several UUTs. In some cases, the same test can be reused without any alteration. For example, a USB 3.0 bus is ubiquitous, and a test aimed at fault detection and diagnoses can be used as part of the test of any UUT that uses this bus. Additionally, parts of the test set may be reused for testing another high-speed I/O. It is reasonable to utilize some of the test routines used in a USB 3.0 test, in the development of a USB 3.1 (running at 10 Gbps), even if the latter has substantial differences in protocol. Many of the SI developed for one protocol can be reused as is, while other SIs may need to undergo modifications before reuse. The modifications will likely take less time and effort than starting from scratch. This paper illustrates an example of high-speed I/O testing, generalizes failure modes that are likely to occur in high-speed I/O, and offers a strategy for testing them with SIs within FPGAs. This strategy offers several advantages besides reusability, including tester proximity to the UUT, test modularization, standardization approaching an ATE-agnostic test development process, overcoming physical limitations of general-purpose test instruments, and utilization of specific-purpose test instruments. Additionally, test instrument obsolescence can be overcome by upgrading to ever-faster and larger FPGAs without losing any previously developed design effort. With SIs and tests scalable and upward compatible, the test engineer need not start test development for high-speed I/O from scratch, which will substantially reduce time and effort.
