Technical Library | 2017-02-09 17:08:44.0
The SMT assembly world, especially within the commercial electronics realm, is dominated by no-clean solder paste technology. A solder paste flux residue that does not require removal is very attractive in a competitive world where every penny of assembly cost counts. One important aspect of the reliability of assembled devices is the nature of the no-clean solder paste flux residue. Most people in this field understand the importance of having a process that renders the solder paste flux residue as benign and inert as possible, thereby ensuring electrical reliability.But, of all the factors that play into the electrical reliability of the solder paste flux residue, is there any impact made by the age of the solder paste and how it was stored? This paper uses J-STD-004B SIR (Surface Insulation Resistance) testing to examine this question.
Technical Library | 2008-02-26 15:02:19.0
More and more chip packages need multi-GHz RF structures to meet their performance targets. The ideal chip package needs to combine RF features with Digital features for these applications. They drive low-loss, controlled impedance transmission lines, flexibility in assigned signal and power layers, and clearances of various shapes in power layers. Building these features in a chip package is difficult without making the stack-up very thick or compromising the reliability of the product. In the present paper, we have designed and built a flip-chip package test vehicle (TV) to make new RF structures, using Z-axis interconnection (Zinterconnect) building blocks.
Technical Library | 2016-10-27 16:24:23.0
Press-fit technology is a proven and widely used and accepted interconnection method for joining electronics assemblies. Printed Circuit Board Assembly Systems and typical functional subassemblies are connected through press-fit connectors. The Press-Fit Compliant Pin is a proven interconnect termination to reliably provide electrical and mechanical connections from a Printed Circuit Board to an Electrical Connector. Electrical Connectors are then interconnected together providing board to board electrical and mechanical inter-connection. Press-Fit Compliant Pins are housed within Connectors and used on Backplanes, Mid-planes and Daughter Card Printed Circuit Board Assemblies. High reliability OEM (Original Equipment Manufacturer) computer designs continue to use press-fit connections to overcome challenges associated with soldering, rework, thermal cycles, installation and repair. This paper investigates the technical roadmap for press fit technology, putting special attention to main characteristics such, placement and insertion, inspection, repair, pin design trends, challenges and solutions. Critical process control parameters within an assembly manufacturing are highlighted.
Technical Library | 2011-10-06 13:59:04.0
The desire to have more functionality into increasingly smaller size end products has been pushing the PCB and IC Packaging industry towards High Density Interconnect (HDI) and 3D Packaging (stacked dies, embedded packaged components). Many companies in the high-end consumer electronics market place have been embedding passive chip components on inner PCB and IC Packages for a few years now. However, embedding packaged components on inner layers has remained elusive for the broader market due to lack of proper design tools and high cost of embedding components on inner layers (...) This paper will highlight several key industrialization aspects addressed in the frame of the European funded FP7 HERMES* project to build a manufacturing environment for products with embedded components. The program entered its third year and is now dealing with the manufacturing of functional demonstrators as an introduction to industrialization.
Technical Library | 2009-04-30 18:06:24.0
This presentation surveys the most significant via and via-related laminate failure mechanisms from past to present using data from current induced thermal cycling (CITC) testing, failure analysis, and other sources. The relative life and failure modes of thru vias, buried vias, and microvias (stacked vs. non-stacked) are compared, along with the affect of structure, materials, and peak temperatures on the above. The origin of via-induced laminate failures such as "eyebrow cracks" and Pb free related internal delamination is also explored.
Technical Library | 2016-02-04 19:11:47.0
In a typical mechatronic manufacturing functional test setup, actual load simulations are usually done by connecting the DUT outputs to power or ground in order to establish either a high or low side driver. Each output is connected with different load and the test will either be sequential or concurrent. At lower power levels, these can usually be managed with general purpose switches. However, when it comes to higher power levels of currents more than 5 amps, such switching and loading might pose a greater challenge. Furthermore, critically in the manufacturing line, the tradeoff between cost and test time would have a great influence on the test strategy.This paper will present some key points to design a cost effective high power switching and load management solution.
Technical Library | 2021-12-21 23:15:44.0
High Density Interconnect (HDI) technologies are being used widely in Asia and Europe in consumer electronics for portable wireless communication and computing, digital imaging, and chip packaging. Although North America lags behind in developing process capability for this technology, HDI will become a significant business segment for North America. For this to happen, the printed circuit board shops will have to become process capable in fabricating fine lines and spaces, and also be capable in forming and plating microvias.
Technical Library | 2019-01-10 10:24:47.0
We notice that the quantities of material that are to be dosed are becoming more and more divergent. In addition to large media volumes, small and very small quantities are also increasingly coming into focus. For example autonomous driving: These vehicles already produce an immense amount of data today. When potting the associated sensors, cameras, and ECUs, it is important to ensure a precise and repeatable media application – even with volumes of only 0.03 ml. In contrast, when high-voltage batteries for electric cars are potted, 5 to 10 litres of heat-conducting paste are required per vehicle – and the trend is rising. Optical bonding used in display production, on the other hand, is in the medium volume range. The challenge now is to cover the entire volume spectrum reliably and in compliance with the required cycle times. This is remedied by a modular system of scalable modules, which offers the customer the necessary flexibility and enables him to plan a system according to his needs.
Technical Library | 2018-11-07 20:48:01.0
Glass offers a number of advantages as a dielectric material, such as a low coefficient of thermal expansion (CTE), high dimensional stability, high thermal conductivity and suitable dielectric constant. These properties make glass an ideal candidate for, among other things, package substrate and high-frequency PCB applications. We report here a novel process for the production of printed circuit boards and integrated circuit packaging using glass as both a dielectric medium and a platform for wiring simultaneously.
Technical Library | 2018-07-11 22:46:13.0
For a demanding automotive electronics assembly, a highly thermal fatigue resistant solder alloy is required, which makes the lead-free Sn-Ag-Cu type solder alloy unusable. Sn-Ag-Bi-In solder alloy is considered as a high reliability solder alloy due to significant improvement in thermal fatigue resistance as compared to a standard Sn-Ag-Cu alloy. The alloy has not only good thermal fatigue properties but it also has superior ductility and tensile strength by appropriate addition of In; however, initial results indicated a sub-par performance in joint reliability when it is soldered on a printed circuit board (PCB) with Electroless Nickel Immersion Gold (ENIG) surface finish. Numerous experiments were performed to find out appropriate alloying element which would help improve the performance on ENIG PCBs. Sn-Ag-Bi-In solder alloys with and without Cu additions were prepared and then tests were carried out to see the performance in a thermal fatigue test and a drop resistance test.to investigate the impact of Cu addition towards the improvement of joint reliability on ENIG finish PCB. Also, the mechanism of such improvement is documented.
