Technical Library | 2013-02-07 17:01:46.0
Silicone contamination is known to have a negative impact on assembly processes such as soldering, adhesive bonding, coating, and wire bonding. In particular, silicone is known to cause de-wetting of materials from surfaces and can result in adhesive failures. There are many sources for silicone contamination with common sources being mold releases or lubricants on manufacturing tools, offgassing during cure of silicone paste adhesives, and residue from pressure sensitive tape. This effort addresses silicone contamination by quantifying adhesive effects under known silicone contaminations. The first step in this effort identified an FT-IR spectroscopic detection limit for surface silicone utilizing the area under the 1263 cm-1 (Si-CH3) absorbance peak as a function of concentration (µg/cm2). The next step was to pre-contaminate surfaces with known concentrations of silicone oil and assess the effects on surface wetting and adhesion. This information will be used to establish guidelines for silicone contamination in different manufacturing areas within Harris Corporation... First published in the 2012 IPC APEX EXPO technical conference proceedings.
Technical Library | 2014-08-19 15:39:13.0
Understanding warpage of package attach locations on PCBs under reflow temperature conditions is critical in surface mount technology. A new industry standard, IPC 9641, addresses this topic directly for the first time as an international standard.This paper begins by summarizing the sections of the IPC 9641 standard, including, measurement equipment selection, test setup and methodology, and accuracy verification. The paper goes further to discuss practical implementation of the IPC 9641 standards. Key advantages and disadvantages between available warpage measurement methods are highlighted. Choosing the correct measurement technique depends on requirements for warpage resolution, data density, measurement volume, and data correlation. From industry experience, best practice recommendations are made on warpage management of PCB land areas, covering how to setup, run, analyze, and report on local area PCB warpage.The release of IPC 9641 shows that flatness over temperature of the package land area on the PCB is critical to the SMT industry. Furthermore, compatibility of shapes between attaching surfaces in SMT, like a package and PCB, will be critical to product yield and quality in years to come.
Technical Library | 2015-07-14 13:19:10.0
Bottom terminated components (BTC) are leadless components where terminations are protectively plated on the underside of the package. They are all slightly different and have different names, such as QFN (quad flat no lead), DFN (dual flat no lead), LGA (land grid array) and MLF (micro lead-frame. BTC assembly has increased rapidly in recent years. This type of package is attractive due to its low cost and good performance like improved signal speeds and enhanced thermal performance. However, bottom terminated components do not have any leads to absorb the stress and strain on the solder joints. It relies on the correct amount of solder deposited during the assembly process for having a good solder joint quality and reliable reliability. Voiding is typically seen on the BTC solder joint, especially on the thermal pad of the component. Voiding creates a major concern on BTC component’s solder joint reliability. There is no current industry standard on the voiding criteria for bottom terminated component. The impact of voiding on solder joint reliability and the impact of voiding on the heat transfer characteristics at BTC component are not well understood. This paper will present some data to address these concerns.
Technical Library | 2016-07-28 17:00:20.0
Packaging trends enable disruptive technologies. The miniaturization of components reduces the distance between conductive paths. Cleanliness of electronic hardware based on the service exposure of electrical equipment and controls can improve the reliability and cost effectiveness of the entire system. Problems resulting from leakage currents and electrochemical migration lead to unintended power disruption and intermittent performance problems due to corrosion issues.Solvent cleaning has a long history of use for cleaning electronic hardware. Limitations with solvent based cleaning agents due to environmental effects and the ability to clean new flux designs commonly used to join miniaturized components has limited the use of solvent cleaning processes for cleaning electronic hardware. To address these limitations, new solvent cleaning agents and processes have been designed to clean highly dense electronic hardware.The research study will evaluate the cleaning and electrical performance using the IPC B-52 Test Vehicle. Lead Free noclean solder paste will be used to join the components to the test vehicle. Ion Chromatography and SIR values will be reported.
Technical Library | 2017-02-28 12:39:50.0
During the last 5 years mobile phones and other portable consumer electronics have been extremely popular and spread all over the world in different climate zones in very high volumes. At the same time the mobile phone terminal for many people has become a necessity that is brought with them in any activity they practice. These changes in user behavior have heavily changed the impact on handheld terminals from moisture, sweat, corrosive atmospheres and mechanical drop. As a result of this the requirement to solder joint reliability, corrosion stability and wear resistance are heavily increasing to keep a high reliability of the terminal.Immersion Ni/Au has been the overall dominant surface finish on Printed Wiring Boards (PWB's) for the last 10 years, but a paradigm shift to avoid use of this thin and porous surface finish is ongoing nowadays because it can’t address these challenges in a satisfactory way.In today's handheld terminals, Organic Solder Preservative (OSP) has replaced Immersion Ni/Au on solder pads. Carbon surface finish for Key- and spring contact-pads, combined with the right concept design can make use of Immersion Ni/Au unnecessary in the near future. The result will be higher reliability with less expensive and simpler processes.This paper will discuss the various considerations for choice of surface finish and results from the feasibility studies performed.
Technical Library | 2017-03-02 18:13:05.0
The need for more energy-efficient solid-state switches beyond complementary metal-oxide-semiconductor (CMOS) transistors has become a major concern as the power consumption of electronic integrated circuits (ICs) steadily increases with technology scaling. Nano-Electro-Mechanical (NEM) relays control current flow by nanometer-scale motion to make or break physical contact between electrodes, and offer advantages over transistors for low-power digital logic applications: virtually zero leakage current for negligible static power consumption; the ability to operate with very small voltage signals for low dynamic power consumption; and robustness against harsh environments such as extreme temperatures. Therefore, NEM logic switches (relays) have been investigated by several research groups during the past decade. Circuit simulations calibrated to experimental data indicate that scaled relay technology can overcome the energy-efficiency limit of CMOS technology. This paper reviews recent progress toward this goal, providing an overview of the different relay designs and experimental results achieved by various research groups, as well as of relay-based IC design principles. Remaining challenges for realizing the promise of nano-mechanical computing, and ongoing efforts to address these, are discussed.
Technical Library | 2018-05-09 22:15:29.0
Creep corrosion on printed circuit boards (PCBs) is the corrosion of copper metallization and the spreading of the copper corrosion products across the PCB surfaces to the extent that they may electrically short circuit neighboring features on the PCB. The iNEMI technical subcommittee on creep corrosion has developed a flowers-of-sulfur (FOS) based test that is sufficiently well developed for consideration as an industry standard qualification test for creep corrosion. This paper will address the important question of how relative humidity affects creep corrosion. A creep corrosion tendency that is inversely proportional to relative humidity may allow data center administrators to eliminate creep corrosion simply by controlling the relative humidity in the data center,thus, avoiding the high cost of gas-phase filtration of gaseous contamination. The creep corrosion relative humidity dependence will be studied using a modified version of the iNEMI FOS test chamber. The design modification allows the achievement of relative humidity as low as 15% in the presence of the chlorine-releasing bleach aqueous solution. The paper will report on the dependence of creep corrosion on humidity in the 15 to 80% relative humidity range by testing ENIG (gold on electroless nickel), ImAg (immersion silver) and OSP (organic surface preservative) finished PCBs, soldered with organic acid flux.
Technical Library | 2019-09-19 00:28:48.0
The symbiotic relationship between solder masks and selective finishes is not new. The soldermask application is one of the key considerations to ensure a successful application of a selective finish. The selective finish is the final chemical step of the PCB manufacturing process, this is when the panels are at their most valuable and are unfortunately not re-workable. Imperfections are not tolerated, even if they are wholly cosmetic. Quality issues often manifest themselves in the form of a 'ping pong' conversation between the fabricators, the soldermask suppliers and the selective finish suppliers. Without tangible evidence these discussions are difficult to resolve and the selective finish process is usually regarded as responsible. This paper will focus on the chemical characteristics and use them to predict or identify potential issues before they occur rather than specifically name 'critical' soldermasks. It is also the intention of this paper to address the potential of a soldermask to react to common yield hiking practices like UV bumping and oven curing. It is hoped that this awareness will help fabricators to ensure maximum yields by asking the right questions. 'Critical’ soldermasks impact all selective finishes. In this paper, practical experience using immersion tin will be used to highlight the relationship between 'critical' soldermasks and some of the issues seen in the field. The paper will include a novel approach to identify re-deposited volatiles after the reflow.
Technical Library | 2020-12-16 18:50:42.0
System operating speeds continue to increase as a function of the consumer demand for such technologies as faster Internet connectivity, video on demand, and mobile communications technology. As a result, new high performance PCB substrates have emerged to address signal integrity issues at higher operating frequencies. These are commonly called low Dk and/or low loss (Df) materials. The published "typical" values found on a product data sheet provide limited information, usually a single construction and resin content, and are derived from a wide range of test methods and test sample configurations. A printed circuit board designer or front end application engineer must be aware that making a design decision based on the limited information found on a product data sheet can lead to errors which can delay a product launch or increase the assembled PCB cost. The purpose of this paper is to highlight critical selection factors that go beyond a typical product data sheet and explain how these factors must be considered when selecting materials for high speed applications
Technical Library | 2021-08-04 18:46:25.0
The process of printed circuit board assembly (PCBA) involves several machines, such as a stencil printer, placement machine and reflow oven, to solder and assemble electronic components onto printed circuit boards (PCBs). In the production flow, some failure prevention mechanisms are deployed to ensure the designated quality of PCBA, including solder paste inspection (SPI), automated optical inspection (AOI) and in-circuit testing (ICT). However, such methods to locate the failures are reactive in nature, which may create waste and require additional effort to be spent re-manufacturing and inspecting the PCBs. Worse still, the process performance of the assembly process cannot be guaranteed at a high level. Therefore, there is a need to improve the performance of the PCBA process. To address the aforementioned challenges in the PCBA process, an intelligent assembly process improvement system (IAPIS) is proposed, which integrates the k-means clustering method and multi-response Taguchi method to formulate a pro-active approach to investigate and manage the process performance.
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