Technical Library | 2020-04-01 14:24:56.0
It happens much too often; manufacturing engineers are brought into a NEW product design phase at the very end of a design and are asked to provide input that should have been provided much earlier. One needs to understand how the circuit board design and quality of the manufacturing process not only effects assembly yield and product reliability, but how it could also affect the results of any testing that is done to circuit packs during prototyping. It is important that any circuit pack (including prototypes) that will be used in reliability, performance and functional testing be designed with the proper features and assembled with a manufacturing process that has been developed to produce a high-quality assembly. If not, the results of any testing might not represent the actual characteristics of the design and provide miss-guidance to future changes.
Technical Library | 2023-09-13 13:03:25.0
SMT auto aqueous stencil cleaning machines are an essential tool for any SMT production line. These machines use a variety of methods to remove contaminants and debris from SMT stencils, which can cause defects and reliability issues.
Technical Library | 2019-12-05 13:30:46.0
Conformal coatings are regularly employed to protect the surface of a soldered printed circuit board assembly from moisture, chemicals in the PCBA's service environment, and foreign objects or debris. Conformal coatings are nonconductive and therefore cannot be placed on any location where electrical contact will be required, such as connector pins, test points, and sockets. Conformal coatings are also not permitted on any mechanical interface location, such as mounting holes or brackets, to assure the proper fit between items in the final assembly. In order to apply conformal coatings to an assembly and comply with the restrictions on keep-out areas, masking is employed to protect those surfaces.
Technical Library | 2019-05-21 17:20:36.0
Die attach material selection and process implementation play crucial roles in any microelectronic assembly. The chosen attach methods ultimately affect die stress, functionality, thermal management, and reliability of the assembly. Die attach applications are designed to optimize mechanical attachment of the die to the substrate, to create a thermal path from the die to the substrate, and to create an electrical path for a ground plane connection. Some of the more commonly used die attach materials in the microelectronics industry today are epoxies,polyimides, thermoplastics, silicones, solders, and special low outgassing, low stress, anisotropic adhesives.
Technical Library | 2019-10-16 10:20:25.0
A major goal of the development of advanced packaging technology is to reduce the size, weight, and power consumption of electronics components using state-of-the-art commercial technologies. One of the novel concepts involves the use of all three spatial dimensions when designing and producing new systems. In the past, electronic structures tended to be two dimensional in nature. Generally speaking, individually packaged integrated circuit (IC) dies were interconnected on printed circuit boards. Techniques such as die and package stacking naturally contribute to a reduction of the spatial footprint of any given electronic system design.
Technical Library | 2019-05-23 10:27:13.0
The technical tips have offered valuable details and techniques into various aspects of electronics manufacturing. This has been validated by the reader responses concurring with our assessments, offering additional insight, or in some rare cases, stating divergent points of view on any particular matter. In a bit of a strategic departure from the normal range of electronic manufacturing topics, ACI Technologies,Inc. would like our readers to consider the importance of being well prepared in the arena of designed experiments in order to properly qualify a manufacturing process. This particular topic has relevance because of the associated scope of work ACI Technologies encounters in numerous projects from material R&D to manufacturing process optimization, which require appropriate experimental designs to ascertain the significant data.
Technical Library | 2019-05-24 09:27:33.0
Decapsulation, or de-cap, is a failure analysis technique which involves the removal of material packaging from an integrated circuit (IC). After de-cap, visual inspection by optical microscopy of the internal circuitry may reveal areas where damage is most likely to have occurred. In addition, scanning electron microscopy (SEM) with energy dispersive x-ray spectroscopy (EDS) can identify the composition of any anomalies present after de-cap under higher magnification. The removal process of package material can be done either mechanically or chemically depending on the design of the integrated circuit. With ceramic packaging, de-cap is usually done mechanically by chiseling off the top with a fine razor and small hammer. For plastic packaging, de-cap requires chemical etching by strong acids. In this Tech Tips article, de-cap by chemical etching will be outlined step by step.
Technical Library | 2019-05-29 10:38:59.0
Decapsulation, or de-cap, is a failure analysis technique which involves the removal of material packaging from an integrated circuit (IC). After de-cap, visual inspection by optical microscopy of the internal circuitry may reveal areas where damage is most likely to have occurred. In addition, scanning electron microscopy (SEM) with energy dispersive x-ray spectroscopy (EDS) can identify the composition of any anomalies present after de-cap under higher magnification. The removal process of package material can be done either mechanically or chemically depending on the design of the integrated circuit. With ceramic packaging, de-cap is usually done mechanically by chiseling off the top with a fine razor and small hammer. For plastic packaging, de-cap requires chemical etching by strong acids. In this Tech Tips article, de-cap by chemical etching will be outlined step by step.
Technical Library | 2019-06-06 13:40:47.0
Legacy electronics assemblies, such as through-hole (Figure 1) and connectorized component packages, are robust and prevalent throughout industry. However, each of these assembly methods have reached their limits in terms of weight, volume, reliability, and most importantly cost. With cost reduction of assemblies now the primary focus area throughout the electronics industry, there is more of a need than ever to implement the latest advancements in surface mount technology (SMT) into electronics assembly designs. Although SMT has been utilized in the electronics industry for many years, implementation of the technology is still in the ever-evolving process of reducing component footprint size, component spacing, and component I/O pitch. Implementation of the most up-to-date SMT processes provides optimal weight, volume, and cost savings, for any type of assembly.
Technical Library | 2019-09-23 09:35:00.0
Failure analysis (FA), by its very nature, is needed only when things goawry. Before any testing is performed on the sample, a decision mustbe made as to whether or not the sample is allowed to be destroyedin the process of testing. Non-destructive testing can allow for re-use of the assembly since the functionality is not altered, but there still remains the possibility that inadvertent damage can occur through the course of the analysis. If non-destructive testing is preferred, then the following types of analysis can be performed. The testing can be divided into four categories: visual, X-ray (X-ray imaging and X-ray fluorescence), cleanliness (resistivity of solvent extract, ion chromatography, and Fourier transform infrared spectroscopy), and mechanical (non-destructive wire bond pull).
