Technical Library | 2022-10-31 17:30:40.0
This paper presents a quantitative analysis of solder joint reliability data for lead-free Sn-Ag-Cu (SAC) and mixed assembly (SnPb + SAC) circuit boards based on an extensive, but non-exhaustive, collection of thermal cycling test results. The assembled database covers life test results under multiple test conditions and for a variety of components: conventional SMT (LCCCs, resistors), Ball Grid Arrays, Chip Scale Packages (CSPs), wafer-level CSPs, and flip-chip assemblies with and without underfill. First-order life correlations are developed for SAC assemblies under thermal cycling conditions. The results of this analysis are put in perspective with the correlation of life test results for SnPb control assemblies. Fatigue life correlations show different slopes for SAC versus SnPb assemblies, suggesting opposite reliability trends under low or high stress conditions. The paper also presents an analysis of the effect of Pb contamination and board finish on lead-free solder joint reliability. Last, test data are presented to compare the life of mixed solder assemblies to that of standard SnPb assemblies for a wide variety of area-array components. The trend analysis compares the life of area-array assemblies with: 1) SAC balls and SAC or SnPb paste; 2) SnPb balls assembled with SAC or SnPb paste.
Technical Library | 2021-08-25 16:34:37.0
As the traditional eutectic SnPb solder alloy has been outlawed, the electronic industry has almost completely transitioned to the lead-free solder alloys. The conventional SAC305 solder alloy used in lead-free electronic assembly has a high melting and processing temperature with a typical peak reflow temperature of 245ºC which is almost 30ºC higher than traditional eutectic SnPb reflow profile. Some of the drawbacks of this high melting and processing temperatures are yield loss due to component warpage which has an impact on solder joint formation like bridging, open defects, head on pillow.
Technical Library | 2021-08-25 16:28:36.0
In this study, a Sn–Bi composite solder paste with thermosetting epoxy (TSEP Sn–Bi) was prepared by mixing Sn–Bi solder powder, flux, and epoxy system. The melting characteristics of the Sn–Bi solder alloy and the curing reaction of the epoxy system were measured by differential scanning calorimeter (DSC). A reflow profile was optimized based on the Sn–Bi reflow profile, and the Organic Solderability Preservative (OSP) Cu pad mounted 0603 chip resistor was chosen to reflow soldering and to prepare samples of the corresponding joint. The high temperature and humidity reliability of the solder joints at 85 #14;C/85% RH (Relative Humidity) for 1000 h and the thermal cycle reliability of the solder joints from
Technical Library | 2015-01-08 17:26:59.0
Regardless of the accelerating trend for design and conversion to Pb-free manufacturing, many high reliability electronic equipment producers continue to manufacture and support tin-lead (SnPb) electronic products. Certain high reliability electronic products from the telecommunication, military, and medical sectors manufacture using SnPb solder assembly and remain in compliance with the RoHS Directive (restriction on certain hazardous substances) by invoking the European Union Pb-in-solder exemption. Sustaining SnPb manufacturing has become more challenging because the global component supply chain is converting rapidly to Pb-free offerings and has a decreasing motivation to continue producing SnPb product for the low-volume, high reliability end users. Availability of critical, larger SnPb BGA components is a growing concern
Technical Library | 2022-06-27 16:50:26.0
Electronics industry is one of the fastest evolving, innovative, and most competitive industries. In order to meet the high consumption demands on electronics components, quality standards of the products must be well-maintained. Automatic optical inspection (AOI) is one of the non-destructive techniques used in quality inspection of various products. This technique is considered robust and can replace human inspectors who are subjected to dull and fatigue in performing inspection tasks. A fully automated optical inspection system consists of hardware and software setups. Hardware setup include image sensor and illumination settings and is responsible to acquire the digital image, while the software part implements an inspection algorithm to extract the features of the acquired images and classify them into defected and non-defected based on the user requirements. A sorting mechanism can be used to separate the defective products from the good ones. This article provides a comprehensive review of the various AOI systems used in electronics, micro-electronics, and opto-electronics industries. In this review the defects of the commonly inspected electronic components, such as semiconductor wafers, flat panel displays, printed circuit boards and light emitting diodes, are first explained. Hardware setups used in acquiring images are then discussed in terms of the camera and lighting source selection and configuration. The inspection algorithms used for detecting the defects in the electronic components are discussed in terms of the preprocessing, feature extraction and classification tools used for this purpose. Recent articles that used deep learning algorithms are also reviewed. The article concludes by highlighting the current trends and possible future research directions.
Technical Library | 2021-08-04 18:46:25.0
The process of printed circuit board assembly (PCBA) involves several machines, such as a stencil printer, placement machine and reflow oven, to solder and assemble electronic components onto printed circuit boards (PCBs). In the production flow, some failure prevention mechanisms are deployed to ensure the designated quality of PCBA, including solder paste inspection (SPI), automated optical inspection (AOI) and in-circuit testing (ICT). However, such methods to locate the failures are reactive in nature, which may create waste and require additional effort to be spent re-manufacturing and inspecting the PCBs. Worse still, the process performance of the assembly process cannot be guaranteed at a high level. Therefore, there is a need to improve the performance of the PCBA process. To address the aforementioned challenges in the PCBA process, an intelligent assembly process improvement system (IAPIS) is proposed, which integrates the k-means clustering method and multi-response Taguchi method to formulate a pro-active approach to investigate and manage the process performance.
Technical Library | 2020-10-08 01:01:01.0
Flexible hybrid electronics (FHE) is emerging as a promising solution to combine the benefits of printed electronics and silicon technology. FHE has many high-impact potential areas, such as wearable applications, health monitoring, and soft robotics, due to its physical advantages, which include light weight, low cost and the ability conform to different shapes. However, physical deformations in the field can lead to significant testing and validation challenges. For example, designers must ensure that FHE devices continue to meet their specs even when the components experience stress due to bending. Hence, physical deformation, which is hard to emulate, has to be part of the test procedures for FHE devices. This paper is the first to analyze stress experience at different parts of FHE devices under different bending conditions. We develop a novel methodology to maximize the test coverage with minimum number of text vectors with the help of a mixed integer linear programming formulation. We validate the proposed approach using an FHE prototype and COMSOL Multiphysics simulations
Technical Library | 2022-10-31 17:09:04.0
The global transition to lead-free (Pb-free) electronics has led component and equipment manufacturers to transform their tin–lead (SnPb) processes to Pb-free. At the same time, Pb-free legislation has granted exemptions for some products whose applications require high long-term reliability. However, due to a reduction in the availability of SnPb components, compatibility concerns can arise if Pb-free components have to be utilized in a SnPb assembly. This compatibility situation of attaching a Pb-free component in a SnPb assembly is generally termed "backward compatibility." This paper presents the results of microstructural analysis of mixed solder joints which are formed by attaching Pb-free solder balls (SnAgCu) of a ball-grid-array component using SnPb paste. The experiment evaluates the Pb phase coarsening in bulk solder microstructure and the study of intermetallic compounds formed at the interface between the solder and the copper pad.
Technical Library | 2023-06-12 19:00:21.0
The SMT print process is now very mature and well understood. However as consumers continually push for new electronic products, with increased functionality and smaller form factor, the boundaries of the whole assembly process are continually being challenged. Miniaturisation raises a number of issues for the stencil printing process. How small can we print? What are the tightest pitches? Can we print small deposits next too large for high mix technology assemblies? How closely can we place components for high density products? ...And then on top of this, how can we satisfy some of the cost pressures through the whole supply chain and improve yield in the production process! Today we are operating close to the limits of the stencil printing process. The area ratio rule (the relationship between stencil aperture opening and aperture surface area) fundamentally dictates what can and cannot be achieved in a print process. For next generation components and assembly processes these established rules need to be broken! New stencil printing techniques are becoming available which address some of these challenges. Active squeegees have been shown to push area ratio limits to new boundaries, permitting printing for next generation 0.3CSP technology. Results also indicate there are potential yield benefits for today's leading edge components as well. Stencil coatings are also showing promise. In tests performed to date it is becoming apparent that certain coatings can provide higher yield processing by extending the number of prints that can be performed in-between stencil cleans during a print process. Preliminary test results relating to the stencil coating technology and how they impact miniaturisation and high yield processing will be presented.
Technical Library | 2023-08-04 15:38:36.0
The MicroLeadFrame® (MLF®)/Quad Flat No-Lead (QFN) packaging solution is extremely popular in the semiconductor industry. It is used in applications ranging from consumer electronics and communications to those requiring high reliability performance, such as the automotive industry. The wide acceptance of this packaging design is primarily due to its flexible form factors, size, scalability and thermal dissipation capabilities. The adaptation and acceptance of MLF/QFN packages in automotive high reliability applications has led to the development of materials and processes that have extended its capabilities to meet the performance and quality requirements. One of process developments that is enabling the success of the MLF/QFN within the automotive industry has been the innovation of side wettable flanks that provide the capability to inspect the package lead to printed circuit board (PCB) interfaces for reliable solder joints. Traditionally, through-board X-ray was the accepted method for detecting reliable solder joints for leadless packages. However, as PBC layer counts and routing complexities have increased, this method to detect well-formed solder fillets has proven ineffective and incapable of meeting the inspection requirements. To support increased reliability and more accurate inspection of the leadless package solder joints, processes to form side-wettable flanks have been developed. These processes enable the formation of solder fillets that are detectable using state-of-the-art automated optical inspection (AOI) equipment, providing increased throughput for the surface mount technology (SMT) processes and improved quality as well.
