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Effect of Reflow Profile on SnPb and SnAgCu Solder Joint Shear Force

Technical Library | 2023-01-17 17:27:13.0

Reflow profile has significant impact on solder joint performance because it influences wetting and microstructure of the solder joint. The degree of wetting, the microstructure (in particular the intermetallic layer), and the inherent strength of the solder all factor into the reliability of the solder joint. This paper presents experimental results on the effect of reflow profile on both 63%Sn 37%Pb (SnPb) and 96.5%Sn 3.0%Ag 0.5%Cu (SAC 305) solder joint shear force. Specifically, the effect of the reflow peak temperature and time above solder liquidus temperature are studied. Nine reflow profiles for SAC 305 and nine reflow profiles for SnPb have been developed with three levels of peak temperature (230 o C, 240 o C, and 250 o C for SAC 305; and 195 o C, 205 o C, and 215 o C for SnPb) and three levels of time above solder liquidus temperature (30 sec., 60 sec., and 90 sec.). The shear force data of four different sizes of chip resistors (1206, 0805, 0603, and 0402) are compared across the different profiles. The shear force of the resistors is measured at time 0 (right after assembly). The fracture surfaces have been studied using a scanning electron microscopy (SEM) with energy dispersive spectroscopy (EDS)

Heller Industries Inc.

Strain Solitons and Topological Defects in Bilayer Graphene

Technical Library | 2014-05-01 15:14:12.0

Bilayer graphene has been a subject of intense study in recent years. The interlayer registry between the layers can have dramatic effects on the electronic properties: for example, in the presence of a perpendicular electric field, a band gap appears in the electronic spectrum of so-called Bernal-stacked graphene. This band gap is intimately tied to a structural spontaneous symmetry breaking in bilayer graphene, where one of the graphene layers shifts by an atomic spacing with respect to the other. This shift can happen in multiple directions, resulting in multiple stacking domains with soliton-like structural boundaries between them

Cornell University

Design and Construction Affects on PWB Reliability

Technical Library | 2012-04-26 18:52:37.0

First presented at IPC Apex Expo 2012. The reliability, as tested by thermal cycling, of printed wire boards (PWB) are established by three variables; copper quality, material robustness and design. The copper quality was most influential and could be eva

PWB Interconnect Solutions Inc.

Focus on temperature and customized sensors

Technical Library | 2016-10-24 14:59:03.0

Temperature measurement is one of the most important physical parameters when determining quality, accuracy and reliability of processes not only in industrial use, but also in almost all human activities. Temperature sensors are produced with different technologies to fit specific application requirements. IST AG has concentrated one part of the development and manufacturing on high-end thin-film temperature sensors. This know-how is partially derived from the semiconductor industry and allows us to manufacture sensors with high accuracy, excellent long-term stability, high reliability and repeatability within a wide temperature range from -200 °C up to 1000 °C. Because of very small dimensions and low thermal mass, the thin-film temperature sensors exhibit a very short response time.

Innovative Sensor Technology, USA Division

Approaches to Overcome Nodules and Scratches on Wire Bondable Plating on PCBs

Technical Library | 2020-08-27 01:22:45.0

Initially adopted internal specifications for acceptance of printed circuit boards (PCBs) used for wire bonding was that there were no nodules or scratches allowed on the wirebond pads when inspected under 20X magnification. The nodules and scratches were not defined by measurable dimensions and were considered to be unacceptable if there was any sign of a visual blemish on wire-bondable features. Analysis of the yield at a PCB manufacturer monitored monthly for over two years indicated that the target yield could not be achieved, and the main reasons for yield loss were due to nodules and scratches on the wirebonding pads. The PCB manufacturer attempted to eliminate nodules and scratches. First, a light-scrubbing step was added after electroless copper plating to remove any co-deposited fine particles that acted as a seed for nodules at the time of copper plating. Then, the electrolytic copper plating tank was emptied, fully cleaned, and filtered to eliminate the possibility of co-deposited particles in the electroplating process. Both actions greatly reduced the density of the nodules but did not fully eliminate them. Even though there was only one nodule on any wire-bonding pad, the board was still considered a reject. To reduce scratches on wirebonding pads, the PCB manufacturer utilized foam trays after routing the boards so that they did not make direct contact with other boards. This action significantly reduced the scratches on wire-bonding pads, even though some isolated scratches still appeared from time to time, which caused the boards to be rejected. Even with these significant improvements, the target yield remained unachievable. Another approach was then taken to consider if wire bonding could be successfully performed over nodules and scratches and if there was a dimensional threshold where wire bonding could be successful. A gold ball bonding process called either stand-off-stitch bonding (SSB) or ball-stitch-on-ball bonding (BSOB) was used to determine the effects of nodules and scratches on wire bonds. The dimension of nodules, including height, and the size of scratches, including width, were measured before wire bonding. Wire bonding was then performed directly on various sizes of nodules and scratches on the bonding pad, and the evaluation of wire bonds was conducted using wire pull tests before and after reliability testing. Based on the results of the wire-bonding evaluation, the internal specification for nodules and scratches for wirebondable PCBs was modified to allow nodules and scratches with a certain height and a width limitation compared to initially adopted internal specifications of no nodules and no scratches. Such an approach resulted in improved yield at the PCB manufacturer.

Teledyne DALSA

Effects of Tg and CTE on Semiconductor Encapsulants

Technical Library | 1999-07-21 08:49:49.0

As the role of direct-chip-attachment increases in the electronics industry, the reliability and performance of COB packaging materials becomes an increasing concern. Although many factors influence component reliability, the biggest determinants of performance are often the glass transition temperature (Tg) and the coefficient of thermal expansion (CTE) of the encapsulant or underfill. This paper discusses exactly what these properties are, how they are measured, and why they are important to device-reliability.

Henkel Electronic Materials

Assembly and Rework of Lead Free Package on Package Technology

Technical Library | 2012-03-22 20:40:01.0

Miniaturization continues to be a driving force in both integrated circuit packaging and printed circuit board laminate technology. In addition to decreasing component pitch (lead to lead spacing), utilization of the vertical space by stacking packages ha

Electronics

Effects of Tin and Copper Nanotexturization on Tin Whisker Formation

Technical Library | 2012-08-16 22:38:05.0

First published in the 2012 IPC APEX EXPO technical conference proceedings. The physical mechanisms behind tin whisker formation in pure tin (Sn) films continue to elude the microelectronics industry. Despite modest advances in whisker mitigation techniqu

Johns Hopkins Applied Physics Laboratory

No-Clean Flux Residue and Underfill Compatibility Effects on Electrical Reliability

Technical Library | 2013-04-11 15:43:17.0

With the explosion of growth in handheld electronics devices, manufacturers have been forced to look for ways to reinforce their assemblies against the inevitable bumps and drops that their products experience in the field. One method of reinforcement has been the utilization of underfills to "glue" certain SMDs to the PCB. Bumped SMDs attached to the PCB with a no-clean soldering process offer the unavoidable scenario of the underfill coming in contact with a flux residue. This may or may not create a reliability issue... First published in the 2012 IPC APEX EXPO technical conference proceedings

Indium Corporation

A Review of Corrosion and Environmental Effects on Electronics

Technical Library | 2013-08-01 13:17:44.0

Electronic industry uses a number of metallic materials in various forms. Also new materials and technology are introduced all the time for increased performance. In recent years, corrosion of electronic systems has been a significant issue. Multiplicity of materials used is one reason limiting the corrosion reliability. However, the reduced spacing between components on a printed circuit board (PCB) due to miniaturization of device is another factor that has made easy for interaction of components in corrosive environments. Presently the knowledge on corrosion issues of electronics is very limited. This paper reviews briefly the materials used in electronic systems, factors influencing corrosion, types of corrosion observed in electronics, and testing methods.

Technical University of Denmark

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