Technical Library: bare board testing (Page 11 of 14)

Making Sense of Laminate Dielectric Properties

Technical Library | 2020-12-16 18:50:42.0

System operating speeds continue to increase as a function of the consumer demand for such technologies as faster Internet connectivity, video on demand, and mobile communications technology. As a result, new high performance PCB substrates have emerged to address signal integrity issues at higher operating frequencies. These are commonly called low Dk and/or low loss (Df) materials. The published "typical" values found on a product data sheet provide limited information, usually a single construction and resin content, and are derived from a wide range of test methods and test sample configurations. A printed circuit board designer or front end application engineer must be aware that making a design decision based on the limited information found on a product data sheet can lead to errors which can delay a product launch or increase the assembled PCB cost. The purpose of this paper is to highlight critical selection factors that go beyond a typical product data sheet and explain how these factors must be considered when selecting materials for high speed applications

Isola Group

Factors That Influence Side-Wetting Performance on IC Terminals

Technical Library | 2023-08-04 15:27:30.0

A designed experiment evaluated the influence of several variables on appearance and strength of Pb-free solder joints. Components, with leads finished with nickel-palladium-gold (NiPdAu), were used from Texas Instruments (TI) and two other integrated circuit suppliers. Pb-free solder paste used was tin-silver-copper (SnAgCu) alloy. Variables were printed wiring board (PWB) pad size/stencil aperture (the pad finish was consistent; electrolysis Ni/immersion Au), reflow atmosphere, reflow temperature, Pd thickness in the NiPdAu finish, and thermal aging. Height of solder wetting to component lead sides was measured for both ceramic plate and PWB soldering. A third response was solder joint strength; a "lead pull" test determined the maximum force needed to pull the component lead from the PWB. This paper presents a statistical analysis of the designed experiment. Reflow atmosphere and pad size/stencil aperture have the greatest contribution to the height of lead side wetting. Reflow temperature, palladium thickness, and preconditioning had very little impact on side-wetting height. For lead pull, variance in the data was relatively small and the factors tested had little impact.

Texas Instruments

Comparing Digital and Analogue X-ray Inspection for BGA, Flip Chip and CSP Analysis

Technical Library | 2023-11-20 18:49:11.0

Non-destructive testing during the manufacture of printed wiring boards (PWBs) has become ever more important for checking product quality without compromising productivity. Using x-ray inspection, not only provides a non-destructive test but also allows investigation within optically hidden areas, such as the quality of post solder reflow of area array devices (e.g. BGAs, CSPs and flip chips). As the size of components continues to diminish, today's x-ray inspection systems must provide increased magnification, as well as better quality x-ray images to provide the necessary analytical information. This has led to a number of x-ray manufacturers offering digital x-ray inspection systems, either as standard or as an option, to satisfy these needs. This paper will review the capabilities that these digital x-ray systems offer compared to their analogue counterparts. There is also a discussion of the various types of digital x-ray systems that are available and how the use of different digital detectors influences the operational capabilities that such systems provide.

Nordson DAGE

Factors That Influence Side-Wetting Performance on IC Terminals

Technical Library | 2024-04-08 15:46:36.0

A designed experiment evaluated the influence of several variables on appearance and strength of Pb-free solder joints. Components, with leads finished with nickel-palladium-gold (NiPdAu), were used from Texas Instruments (TI) and two other integrated circuit suppliers. Pb-free solder paste used was tin-silver-copper (SnAgCu) alloy. Variables were printed wiring board (PWB) pad size/stencil aperture (the pad finish was consistent; electrolysis Ni/immersion Au), reflow atmosphere, reflow temperature, Pd thickness in the NiPdAu finish, and thermal aging. Height of solder wetting to component lead sides was measured for both ceramic plate and PWB soldering. A third response was solder joint strength; a "lead pull" test determined the maximum force needed to pull the component lead from the PWB. This paper presents a statistical analysis of the designed experiment. Reflow atmosphere and pad size/stencil aperture have the greatest contribution to the height of lead side wetting. Reflow temperature, palladium thickness, and preconditioning had very little impact on side-wetting height. For lead pull, variance in the data was relatively small and the factors tested had little impact.

Texas Instruments

Testing Printed Circuit Boards for Creep Corrosion in Flowers of Sulfur Chamber

Technical Library | 2015-07-16 17:24:23.0

Qualification of electronic hardware from a corrosion resistance standpoint has traditionally relied on stressing the hardware in a variety of environments. Before the development of tests based on mixed flowing gas (MFG), hardware was typically exposed to temperature-humidity cycling. In the pre-1980s era, component feature sizes were relatively large. Corrosion, while it did occur, did not in general degrade reliability. There were rare instances of the data center environments releasing corrosive gases and corroding hardware. One that got a lot of publicity was the corrosion by sulfur-bearing gases given off by data center carpeting. More often, corrosion was due to corrosive flux residues left on as-manufactured printed circuit boards (PCBs) that led to ion migration induced electrical shorting. Ion migration induced failures also occurred inside the PCBs due to poor laminate quality and moisture trapped in the laminate layers.

iNEMI (International Electronics Manufacturing Initiative)

Assembly and Reliability of 1704 I/O FCBGA and FPBGAs

Technical Library | 2013-03-14 17:19:28.0

Commercial-off-the-shelf ball/column grid array packaging (COTS BGA/CGA) technologies in high reliability versions are now being considered for use in a number of National Aeronautics and Space Administration (NASA) electronic systems. Understanding the process and quality assurance (QA) indicators for reliability are important for low-risk insertion of these advanced electronic packages. This talk briefly discusses an overview of packaging trends for area array packages from wire bond to flip-chip ball grid array (FCBGA) as well as column grid array (CGA). It then presents test data including manufacturing and assembly board-level reliability for FCBGA packages with 1704 I/Os and 1-mm pitch, fine pitch BGA (FPBGA) with 432 I/Os and 0.4-mm pitch, and PBGA with 676 I/Os and 1.0-mm pitch packages. First published in the 2012 IPC APEX EXPO technical conference proceedings.

Jet Propulsion Laboratory

Profiled Squeegee Blade: Rewrites the Rules for Angle of Attack

Technical Library | 2014-12-24 19:22:52.0

For centuries, the squeegee blade has been used throughout many applications for depositing viscous materials through screens and stencils to transfer images on to substrates, from cloth material to electronic circuit boards. One area of blade printing mechanics that have been reviewed many times is the angle of attack of the blade. Typically it has been tested from 45 degrees to 60 degrees to optimize the printing quality and efficiency. However, this typically ends up as a compromise, from fill characteristics (45 degrees) to print definition (60 degrees). This paper will present the revolutionary performance of the profiled squeegee blade, which has recently been developed to create a virtual multi angle of attack for unsurpassed process control for all types of stencil printing processes.

Lu-Con Technologies

Innovation ploughing into the automotive industry with the help of PCB’s

Technical Library | 2016-08-17 01:24:36.0

To stake a claim in upcoming new technologies and increasing improved customer experience, it is now becoming a central point of consideration to bring out the new classy vehicle design, car manufacturing techniques, testing system in the global market. The current vehicle manufacturer’s also aim to maintain equilibrium between deep capital investment and long product cycle to make the car model a success story. With this, the type of printed circuit board to be used in the vehicle is decided with focusing more on the type of material used in the vehicle and the level of electronic manufacturing and design solution needed in the vehicle production. To go into the roots of the automotive industry, it is equally important to get insights into the PCB used in vehicles and the new innovations brought forward by researchers to create a dream vehicle of the series. The below paragraph drives you to the types of PCB used in the automotive sector.

Technotronix

Development of a Consistent and Reliable Thermal Conductivity Measurement Method, Adapted to Typical Composite Materials Used in the PCB Industry

Technical Library | 2017-05-04 17:35:01.0

Most of today's printed circuit board base materials are anisotropic and it is not possible to use a simple method to measure thermal conductivity along the different axis, especially when a good accuracy is expected. Few base material suppliers' datasheet show X, Y and Z thermal conductivities. In most cases, a single value is given, moreover determined with a generic methodology, and not necessarily adapted to the reality of glass-reinforced composites with a strong anisotropy.After reminding of the fundamentals in thermal science, this paper gives an overview of the state-of the art in terms of thermal conductivity measurement on PCB base materials, and some typical values. It finally proposes an innovative method called transient fin method, and associated test sample, to perform reliable and consistent in plane thermal conductivity measurement on anisotropic PCB base materials.

CIMULEC

Assembly Reliability of TSOP/DFN PoP Stack Package

Technical Library | 2018-12-12 22:20:22.0

Numerous 3D stack packaging technologies have been implemented by industry for use in microelectronics memory applications. This paper presents a reliability evaluation of a particular package-on-package (PoP) that offers a reduction in overall PCB board area requirements while allowing for increases in functionality. It utilizes standard, readily available device packaging methods in which high-density packaging is achieved by: (1) using standard "packaged" memory devices, (2) using standard 3-dimensional (3-D) interconnect assembly. The stacking approach provides a high level of functional integration in well-established and already functionally tested packages. The stack packages are built from TSOP packages with 48 leads, stacked either 2-high or 4-high, and integrated into a single dual-flat-no-lead (DFN) package.

Jet Propulsion Laboratory


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