Technical Library | 2020-11-19 10:15:54.0
How to repair boards if they have been produced for a long time, and the documentation is lost? In this case, intelligent recognition systems can help, which will allow you to identify component pins without documentation for the board. In this article, we will find the STM32F429 board malfunctions without any documentation and in the least amount of time.
Technical Library | 2019-02-05 13:43:14.0
SonoFlux Servo with InSight automated board recognition system helps PCB manufacturers take steps toward greater automation and traceability and the goal of Industry 4.0.
Technical Library | 2019-09-11 23:33:04.0
There are numerous techniques to singulate printed circuit boards after assembly including break-out, routing, wheel cutting and now laser cutting. Lasers have several desirable advantages such as very narrow kerf widths as well as virtually no dust, no mechanical stress, visual pattern recognition and fast set-up changes. The very narrow kerf width resulting from laser ablation and the very tight tolerance of the cutting path placement allows for more usable space on the panel. However, the energy used in the laser cutting process can also create unwanted products on the cut walls as a result of the direct laser ablation. The question raised often is: What are these products, and how far can the creation of such products be mitigated through variation of the laser cutting process, laser parameters and material handling? This paper discusses the type and quantity of the products found on sidewalls of laser depaneled circuit boards and it quantifies the results through measurements of breakdown voltage, as well as electrical impedance. Further this paper discusses mitigation strategies to prevent or limit the amount of change in surface quality as a result of the laser cutting process. Depending on the final application of the circuit board it may prompt a need for proper specification of the expected results in terms of cut surface quality. This in turn will impact the placement of runs and components during layout. It will assist designers and engineers in defining these parameters sufficiently in order to have a predictable quality of the circuit boards after depaneling.
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