Technical Library | 2018-05-09 22:15:29.0
Creep corrosion on printed circuit boards (PCBs) is the corrosion of copper metallization and the spreading of the copper corrosion products across the PCB surfaces to the extent that they may electrically short circuit neighboring features on the PCB. The iNEMI technical subcommittee on creep corrosion has developed a flowers-of-sulfur (FOS) based test that is sufficiently well developed for consideration as an industry standard qualification test for creep corrosion. This paper will address the important question of how relative humidity affects creep corrosion. A creep corrosion tendency that is inversely proportional to relative humidity may allow data center administrators to eliminate creep corrosion simply by controlling the relative humidity in the data center,thus, avoiding the high cost of gas-phase filtration of gaseous contamination. The creep corrosion relative humidity dependence will be studied using a modified version of the iNEMI FOS test chamber. The design modification allows the achievement of relative humidity as low as 15% in the presence of the chlorine-releasing bleach aqueous solution. The paper will report on the dependence of creep corrosion on humidity in the 15 to 80% relative humidity range by testing ENIG (gold on electroless nickel), ImAg (immersion silver) and OSP (organic surface preservative) finished PCBs, soldered with organic acid flux.
Technical Library | 2009-03-19 20:23:54.0
Over the past several years, post-reflow defluxing of circuit assemblies has gained in popularity. Microminiaturization of components and boards, combined with higher expected reliability and increased product liability, have contributed to the prominence of defluxing. Lead-free solder paste - with its higher reflow temperatures and negative effects on flux - increase the likelihood of post-reflow defluxing to increase a product's reliability and aesthetic appearance.
Technical Library | 2018-05-17 11:14:52.0
Intermetallic compound (IMC) growth is being studied in earnest in this past decade because of its significant effect the solder joint reliability. It appears that from numerous investigations conducted, excessive growth of IMC could lead to solder joint failure. Leading to this, many attempts has been made to determine the actual IMC thickness. However, precise and true representation of the growth in the actual 3D phenomenon from 2D cross-section investigations has remained unclear. This paper will focus on the measuring the IMC thickness using 3D surface profilometer (Alicona Focus G4). Lead free solder, Sn3.0Ag0.5Cu (SAC305) was soldered onto copper printed circuit board (Cu PCB). The samples were then subjected to thermal cycle (TC) storage process with temperature range from 0 °C to 100 °C for 200 cycles and up to 1000 cycles were completed.
Technical Library | 2023-08-04 15:27:30.0
A designed experiment evaluated the influence of several variables on appearance and strength of Pb-free solder joints. Components, with leads finished with nickel-palladium-gold (NiPdAu), were used from Texas Instruments (TI) and two other integrated circuit suppliers. Pb-free solder paste used was tin-silver-copper (SnAgCu) alloy. Variables were printed wiring board (PWB) pad size/stencil aperture (the pad finish was consistent; electrolysis Ni/immersion Au), reflow atmosphere, reflow temperature, Pd thickness in the NiPdAu finish, and thermal aging. Height of solder wetting to component lead sides was measured for both ceramic plate and PWB soldering. A third response was solder joint strength; a "lead pull" test determined the maximum force needed to pull the component lead from the PWB. This paper presents a statistical analysis of the designed experiment. Reflow atmosphere and pad size/stencil aperture have the greatest contribution to the height of lead side wetting. Reflow temperature, palladium thickness, and preconditioning had very little impact on side-wetting height. For lead pull, variance in the data was relatively small and the factors tested had little impact.
Technical Library | 2020-08-27 01:22:45.0
Initially adopted internal specifications for acceptance of printed circuit boards (PCBs) used for wire bonding was that there were no nodules or scratches allowed on the wirebond pads when inspected under 20X magnification. The nodules and scratches were not defined by measurable dimensions and were considered to be unacceptable if there was any sign of a visual blemish on wire-bondable features. Analysis of the yield at a PCB manufacturer monitored monthly for over two years indicated that the target yield could not be achieved, and the main reasons for yield loss were due to nodules and scratches on the wirebonding pads. The PCB manufacturer attempted to eliminate nodules and scratches. First, a light-scrubbing step was added after electroless copper plating to remove any co-deposited fine particles that acted as a seed for nodules at the time of copper plating. Then, the electrolytic copper plating tank was emptied, fully cleaned, and filtered to eliminate the possibility of co-deposited particles in the electroplating process. Both actions greatly reduced the density of the nodules but did not fully eliminate them. Even though there was only one nodule on any wire-bonding pad, the board was still considered a reject. To reduce scratches on wirebonding pads, the PCB manufacturer utilized foam trays after routing the boards so that they did not make direct contact with other boards. This action significantly reduced the scratches on wire-bonding pads, even though some isolated scratches still appeared from time to time, which caused the boards to be rejected. Even with these significant improvements, the target yield remained unachievable. Another approach was then taken to consider if wire bonding could be successfully performed over nodules and scratches and if there was a dimensional threshold where wire bonding could be successful. A gold ball bonding process called either stand-off-stitch bonding (SSB) or ball-stitch-on-ball bonding (BSOB) was used to determine the effects of nodules and scratches on wire bonds. The dimension of nodules, including height, and the size of scratches, including width, were measured before wire bonding. Wire bonding was then performed directly on various sizes of nodules and scratches on the bonding pad, and the evaluation of wire bonds was conducted using wire pull tests before and after reliability testing. Based on the results of the wire-bonding evaluation, the internal specification for nodules and scratches for wirebondable PCBs was modified to allow nodules and scratches with a certain height and a width limitation compared to initially adopted internal specifications of no nodules and no scratches. Such an approach resulted in improved yield at the PCB manufacturer.
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