Technical Library | 2023-01-17 17:58:36.0
Heterogeneous integration has become an important performance enabler as high-performance computing (HPC) demands continue to rise. The focus to enable heterogeneous integration scaling is to push interconnect density limit with increased bandwidth and improved power efficiency. Many different advanced packaging architectures have been deployed to increase I/O wire / area density for higher data bandwidth requirements, and to enable more effective die disaggregation. Embedded Multi-die Interconnect Bridge (EMIB) technology is an advanced, cost-effective approach to in-package high density interconnect of heterogeneous chips, providing high density I/O, and controlled electrical interconnect paths between multiple dice in a package. In emerging architectures, it is required to scale down the EMIB die bump pitch in order to further increase the die-to-die (D2D) communication bandwidth. Aa a result, bump pitch scaling poses significant challenges in the plated solder bump reflow process, e.g., bump height / coplanarity control, solder wicking control, and bump void control. It's crucial to ensure a high-quality solder bump reflow process to meet the final product reliability requirements. In this paper, a combined formic acid based fluxless and vacuum assisted reflow process is developed for fine pitch plated solder bumping application. A high-volume production (HVM) ready tool has been developed for this process.
Technical Library | 2006-11-14 12:48:31.0
Content: 1. Bridge from Commercial Reliability 2. Existing PBGA use in Aerospace & Military 3. Drivers: Plastic versus Ceramic Package Weight 4. Attributes of PTFE and Thin Core FC Packages 5. Flip Chip Package Reliability 6. Flip Chip Package
Technical Library | 2012-06-01 00:14:04.0
PLCs are the brains of your operation. When the PLC (Programmable Logic Controllers) is not functioning properly, lines shut down, plants shutdown, even city bridges and water stations could cease to operate. Thousands to millions could be lost by one li
Technical Library | 2012-04-09 14:08:18.0
As the electronics assembly industry evolves, printed circuit board (PCB) features and surface mount technology (SMT) components continue to get smaller and smaller. This miniaturization shrinks the process window at print, placement, and reflow, increasi
Technical Library | 2012-04-12 21:25:13.0
Surface mount technology (SMT) started in the 1960s and became more common in the 1980s. It is the dominant technology in use today. Through-hole technology is still in use, and will be for the foreseeable future, but the drive towards miniaturization of
Technical Library | 2008-05-28 18:41:53.0
This paper describes correlation between a true 2D area measurement (e.g. printer) and a height map generated area from a SPI system. In addition, this paper will explore the correlation between area/volume measurements and bridge detection between 2D/3D techniques. The ultimate goal is to arm the process engineers with information that can be used to make decision that will impact defects, cost, throughput and Return On Investment.
Technical Library | 2016-12-22 16:44:04.0
Particulate matter contamination is known to become wet and therefore ionically conductive and corrosive if the humidity in the environment rises above the deliquescence relative humidity (DRH) of the particulate matter. In wet condition, particulate matter can electrically bridge closely spaced features on printed circuit boards (PCBs), leading to their electrical failure. (...) The objective of this paper is to develop and describe a practical, routine means of measuring the DRH of minute quantities of particulate matter (1 mg or less) found on PCBs.
Technical Library | 2021-03-10 23:57:29.0
Latent short circuit failures have been observed during testing of Printed Circuit Boards (PCB) for power distribution of spacecraft of the European Space Agency. Root cause analysis indicates that foreign fibers may have contaminated the PCB laminate. These fibers can provide a pathway for electromigration if they bridge the clearance between nets of different potential in the presence of humidity attracted by the hygroscopic laminate resin. PCB manufacturers report poor yield caused by contamination embedded in laminate. Inspections show ...
Technical Library | 2023-05-22 16:49:42.0
Our customers' issues • Apertures are getting smaller • Paste does not release as well • Contaminates the bottom of the stencil • Increases defects / reduces yield Insufficient solder Bridging Solder balls on surface of PCB Flux residue • Requires more frequent cleaning • Reduced efficiency (wasted time) • Increased use of consumables (cost) USC fabric (use "cheap" fabric to reduce cost) Lint creates more defects Cleaning chemistries (use IPA to reduce cost) IPA breaks down flux and can create more defects
Technical Library | 2014-06-05 16:44:07.0
Stencil printing capability is becoming more important as the range of component sizes assembled on a single board increases. Coupled with increased component density, solder paste sticking to the aperture sidewalls and bottom of the stencil can cause insufficient solder paste deposits and solder bridging. Yield improvement requires increased focus on stencil technology, printer capability, solder paste functionality and understencil cleaning.(...) The purpose of this research is to study the wipe sequence, wipe frequency and wipe solvent(s) and how these factors interact to provide solder paste printing yield improvement.
