Technical Library | 2022-09-25 20:18:33.0
Printed circuit board (PCB) bending and/or flexing is an unavoidable phenomenon that is known to exist and is easily encountered during electronic board assembly processes. PCB bending and/or flexing is the fundamental source of tensile stress induced on the electronic components on the board assembly. For more brittle components, like ceramic-based electronic components, micro-cracks can be induced, which can eventually lead to a fatal failure of the components. For this reason, many standards organizations throughout the world specify the methods under which electronic board assemblies must be tested to ensure their robustness, sometimes as a pre-condition to more rigorous environmental tests such as thermal cycling or thermal shock.
Technical Library | 2010-07-08 19:49:59.0
Aging characteristics of new lead free solder alloys are in question by many experts because of higher amount of tin’s effect on the diffusion of other metals, primarily copper, to create undesirable boundary intermetallics over long periods of time and even moderately elevated temperatures. A primary layer of intermetallics, Cu6Sn5 forms as the liquid solder makes contact with the solid copper substrate. This reaction however ceases as the solder temperature falls below that of liquidus. A secondary intermetallic Cu3Sn1, an undesirable weak and brittle layer, is thought to form over time and may be accelerated by even mildly elevated temperatures in electronic modules such as laptops under power. This project was designed to quantify the growth rate of Cu3Sn1 over an extended period of time in a thermal environment similar to a laptop in the power on mode.
Technical Library | 2019-06-20 00:09:49.0
It is well known that during service the layer of Cu6Sn5 intermetallic at the interface between the solder and a Cu substrate grows but the usual concern has been that if this layer gets too thick it will be the brittleness of this intermetallic that will compromise the reliability of the joint, particularly in impact loading. There is another level of concern when the Cu-rich Cu3Sn phase starts to develop at the Cu6Sn5/Cu interface and an imbalance in the diffusion of atomic species, Sn and Cu, across that interface results in the formation at the Cu3Sn/Cu interface of Kirkendall voids, which can also compromise reliability in impact loading. However, when, as is the case in some microelectronics, the copper substrate is thin in relation to the volume of solder in the joint an overriding concern is that all of the Cu will be consumed by reaction with Sn to form these intermetallics.This paper reports an investigation into the kinetics of the growth of the interfacial intermetallic, and the consequent reduction in the thickness of the Cu substrate in solder joints made with three alloys, Sn-3.0Ag-0.5Cu, Sn-0.7Cu-0.05Ni and Sn-1.5Bi-0.7Cu-0.05Ni.
Technical Library | 2021-11-03 16:49:59.0
Ultrathin bare die chips were soldered using a novel soldering technology. Using homogeneous flash light generated by high-power xenon flash lamp the dummy components and the bare die NFC chips were successfully soldered to copper tracks on polyimide (PI) and polyethylene terephthalate (PET) flex foils by using industry standard Sn-Ag-Cu lead free alloys. Due to the selectivity of light absorption, a limited temperature increase was observed in the PET substrates while the chip and copper tracks were rapidly heated to a temperatures above the solder melting temperature. This allowed to successfully soldered components onto the delicate polyethylene foil substrates using lead-free alloys with liquidus temperatures above 200 °C. It was shown that by preheating components above the decomposition temperature of solder paste flux with a set of short low intensity pulses the processing window could be significantly extended compared to the process with direct illumination of chips with high intensity flash pulse. Furthermore, it was demonstrated that with localized tuning of pulse intensity components having different heat capacity could be simultaneously soldered using a single flash pulse.
Technical Library | 2018-10-24 18:04:12.0
Polymer Thick Film (PTF)-based printed electronics (aka Printed Electronics) has improved in durability over the last few decades and is now a proven alternative to copper circuitry in many applications once thought beyond the capability of PTF circuitry. This paper describes peak performance and areas for future improvement.State-of-the-art PTF circuitry performance includes the ability to withstand sharp crease tests, 85C/85%RH damp heat 5VDC bias aging (silver migration), auto seat durability cycling, SMT mandrel flexing, and others. The IPC/SGIA subcommittee for Standards Tests development has adopted several ASTM test methods for PTF circuitry and is actively developing needed improvements or additions. These standards are described herein. Advantages of PTF circuitry over copper include: varied conductive material compositions, lower cost and lower environmental impact. Necessary improvements include: robust integration of chip and power, higher conductivity, and fine line multi-layer patterning.
| 1 |
winsouce.jpg)
