Technical Library: button printing on vias (Page 1 of 1)

A Non-destructive Approach to Identify Intermittent Failure Locations on Printed Circuit Cards (PCC) that have been Temperature Cycle Tested

Technical Library | 2020-12-07 15:26:06.0

Temperature cycling testing is a method of accelerated life testing done to PCCs that are exposed to normal operation temperature variations over its lifetime. During the testing, intermittent "open" failures can first occur at the hot and cold extremes of the test, exposing weaknesses in the design and assembly. A poor/weak solder joint fatigues, a via trace or barrel cracks, loose connections or a component fails all causing an intermittent open. When not at extreme temperatures, the PCC assembly relaxes, the "open" closes creating electrical connectivity. If you are monitoring the PCC under test in-situ you will know that an intermittent failure has occurred, and the test could be stopped for inspection. If in-situ monitoring was not implemented, you would not know if there were intermittent failures or not. The PCC gets powered up and works fine at room temperature.

ACI Technologies, Inc.

Printing and Curing of Conductive Ink Track on Curvature Substrate using Fluid Dispensing System and Oven

Technical Library | 2017-12-21 11:24:05.0

The present work concerns on the use of sensors to monitor the structural health of wind turbine . Conventionally the inspection was made using non-contact sensing during the turbine’s inoperable period hence loss occurred. A real -time monitoring system via embedded wireless sensor is preferred but the sensor could only be implanted using non-contact printing method due to most turbine blade s’ curved surface. Conductive ink associate d with non-contact printing method via fluid dispensing system are proposed since conductive inks are proven stretchable and fluid dispensing system enables printing on various substrates and works well with any materials...

University of Tun Hussein Onn

A Study on Effects of Copper Wrap Specifications on Printed Circuit Board Reliability

Technical Library | 2021-07-20 20:02:29.0

During the manufacturing of printed circuit boards (PCBs) for a Flight Project, it was found that a European manufacturer was building its boards to a European standard that had no requirement for copper wrap on the vias. The amount of copper wrap that was measured on coupons from the panel containing the boards of interest was less than the amount specified in IPC-6012 Rev B, Class 3. To help determine the reliability and usability of the boards, three sets of tests and a simulation were run. The test results, along with results of simulation and destructive physical analysis, are presented in this paper. The first experiment involved subjecting coupons from the panels supplied by the European manufacturer to thermal cycling. After 17 000 cycles, the test was stopped with no failures. A second set of accelerated tests involved comparing the thermal fatigue life of test samples made from FR4 and polyimide with varying amounts of copper wrap. Again, the testing did not reveal any failures. The third test involved using interconnect stress test coupons with through-hole vias and blind vias that were subjected to elevated temperatures to accelerate fatigue failures. While there were failures, as expected, the failures were at barrel cracks. In addition to the experiments, this paper also discusses the results of finite-element analysis using simulation software that was used to model plated-through holes under thermal stress using a steady-state analysis, also showing the main failure mode was barrel cracking. The tests show that although copper wrap was sought as a better alternative to butt joints between barrel plating and copper foil layers, manufacturability remains challenging and attempts to meet the requirements often result in features that reduce the reliability of the boards. Experimental and simulation work discussed in this paper indicate that the standard requirements for copper wrap are not contributing to the overall board reliability, although it should be added that a design with a butt joint is going to be a higher risk than a reduced copper wrap design. The study further shows that procurement requirements for wrap plating thickness from Class 3 to Class 2 would pose little risk to reliability (minimum 5 μm/0.197 mil for all via types).Experimental results corroborated by modeling indicate that the stress maxima are internal to the barrels rather than at the wrap location. In fact, the existence of Cu wrap was determined to have no appreciable effect on reliability.

NASA Office Of Safety And Mission Assurance

Factors Affecting the Adhesion of Thin Film Copper on Polyimide

Technical Library | 2017-11-22 12:38:51.0

The use of copper foils laminated to polyimide (PI) as flexible printed circuit board precursor is a standard practice in the PCB industry. We have previously described[1] an approach to very thin copper laminates of coating uniform layers of nano copper inks and converting them into conductive foils via photonic sintering with a multibulb conveyor system, which is consistent with roll-to-roll manufacturing. The copper thickness of these foils can be augmented by electroplating. Very thin copper layers enable etching fine lines in the flexible circuit. These films must adhere tenaciously to the polyimide substrate.In this paper, we investigate the factors which improve and inhibit adhesion. It was found that the ink composition, photonic sintering conditions, substrate pretreatment, and the inclusion of layers (metal and organic) intermediate between the copper and the polyimide are important.

Intrinsiq Materials Inc.

PCB Fabrication Processes and Their Effects on Fine Copper Barrel Cracks

Technical Library | 2015-12-23 16:57:27.0

The onset of copper barrel cracks is typically induced by the presence of manufacturing defects. In the absence of discernible manufacturing defects, the causes of copper barrel cracks in printed circuit board (PCB) plated through holes is not well understood. Accordingly, there is a need to determine what affects the onset of barrel cracks and then control those causes to mitigate their initiation.The objective of this research is to conduct a design of experiment (DOE) to determine if there is a relationship between PCB fabrication processes and the prevalence of fine barrel cracks. The test vehicle used will be a 16-layer epoxy-based PCB that has two different sized plated through holes as well as buried vias.

Raytheon

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Count On Tools, Inc.
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