Technical Library | 2008-01-24 21:42:39.0
Although many through-hole components are being replaced by their surface mount (SMT) counterparts, printed circuit boards (PCBs) are still being designed with both types of components. Often, there are interconnect hardware, displays, or other components that cannot withstand the exposure to the high temperature involved in the wave soldering process. They are generally soldered by hand. The challenge is to determine the optimal method manufacturers can use to solder these boards populated with mixed technology.
Technical Library | 2022-04-26 03:27:56.0
The naming of the chip capacitor: The parameters included in the name of the chip capacitor include the size of the chip capacitor, the material used for this chip capacitor, the required accuracy, the required voltage, the required capacity, the requirements of the terminal and packaging requirements. Generally, the parameters to be provided for ordering a chip capacitor should be the size, the required accuracy, the voltage requirement, the capacity value, and the required brand.
Technical Library | 2019-02-27 15:23:47.0
A study was performed to investigate, evaluate and qualify new reworkable underfill materials to be used primarily with ball grid arrays (BGAs), Leadless SMT devices, QFNs, connectors and passive devices to improve reliability. The supplier of the sole source, currently used underfill, has indicated they may discontinue its manufacture in the near future. The current underfill material is used on numerous circuit card assemblies (CCAs) at several sites and across multiple programs/business areas. In addition, it is used by several of our contract CCA suppliers.The study objectives include evaluation of material properties for down select, dispensability and rework evaluation for further down select, accelerated life testing for final selection and qualification; and process development to implement into production and at our CCA suppliers. The paper will describe the approach used, material property test results and general findings relative to process characteristics and rework ability.
Technical Library | 2013-12-05 17:09:03.0
The functionality of electronic devices continues to increase at an extraordinary rate. Simultaneously consumers are expecting even more and in ever smaller packages. One enabler for shrinking electronics has been the flexible circuit board that allows the circuit board to fit a wide variety of shapes. Flexible printed circuits (FPC) have the capability to be very thin and can have unpackaged components directly attached using surface mount technology (SMT) and flip chip on flex technologies. Bare die can also be thinned and attached very close to the circuit board. However one caveat of high density flexible circuit boards with thin die is that they can be very fragile. The use of back side films and underfill can protect the die making circuits more robust. For underfill to work well it requires good adhesion to the circuit board which can mean that flux residues under the die normally must be removed prior to underfilling.
Technical Library | 2019-03-13 15:19:55.0
It is well documented that Nano coatings on SMT stencils offer many benefits to those assembling PWBs. With reduced standard deviation and improved transfer efficiency nano coatings can provide, there is also a cost. As PWB assemblers work to justify the return on investment, one key question continues to arise. What is the durability or life of these coatings and what can be done in the print process to maximize the life of the coatings?This paper addresses durability of the coatings in relation to the number of print cycles and underside wipe cycles applied as well as materials used on the underside wipe process. Different parameters will be applied and data will be collected. The results of this study will be summarized to help those using or considering the use of these nano coatings to improve their print process and suggestions will be given to maximize the life of the coatings.
Technical Library | 2023-06-12 19:46:10.0
Solder paste printing is understood to be the leading contributor of defects in the electronics assembly process. Because yield accounts for such a large percentage of the margin, the greatest opportunity to improve profitability in the assembly of most electronics can be gained by reducing or eliminating solder defects. This article examines process adjustments made through stencil design that correct a misalignment situation between the PCB and stencil, leading to a 43% reduction in assembly defects. Examples of each are found in Table 1.
Technical Library | 2014-08-19 15:39:13.0
Understanding warpage of package attach locations on PCBs under reflow temperature conditions is critical in surface mount technology. A new industry standard, IPC 9641, addresses this topic directly for the first time as an international standard.This paper begins by summarizing the sections of the IPC 9641 standard, including, measurement equipment selection, test setup and methodology, and accuracy verification. The paper goes further to discuss practical implementation of the IPC 9641 standards. Key advantages and disadvantages between available warpage measurement methods are highlighted. Choosing the correct measurement technique depends on requirements for warpage resolution, data density, measurement volume, and data correlation. From industry experience, best practice recommendations are made on warpage management of PCB land areas, covering how to setup, run, analyze, and report on local area PCB warpage.The release of IPC 9641 shows that flatness over temperature of the package land area on the PCB is critical to the SMT industry. Furthermore, compatibility of shapes between attaching surfaces in SMT, like a package and PCB, will be critical to product yield and quality in years to come.
Technical Library | 2021-09-21 20:20:22.0
The electronics industry has been using the epoxy puck for the processing of the vast majority of electronics microsections since the 1970s. Minimal advancements have been seen in the methods used for precision micro-sections of PCBs, PCBAs, and device packages. This paper will discuss different techniques and approaches in performing precision and analytical micro-sections, which fuse the techniques and materials common in preparation of silicon wafers and bulk materials. These techniques have not only been found to produce excellent optical results, but transfer effectively to SEM for high magnification inspection and further analysis with minimal post-lapping preparation needed. Additionally, processing time is reduced primarily due to a significant reduction of bulk material removal earlier in the preparation, therefore needing less removal at later lapping steps compared to traditional sectioning methods. Additional techniques are introduced that mitigate some classic challenges experienced by technicians over the decades.
Technical Library | 2020-09-23 21:29:25.0
The electronics industry could benefit greatly from using a reliable, manufacturable, reduced temperature, SMT solder material (alloy-composition) which is cost competitive with traditional Sn3Ag0.5Cu (SAC305) solder. The many possible advantages and some disadvantages / challenges are discussed. Until recently, the use of Sn/Bi based materials has been investigated with negative consequences for high strain rate (drop-shock) applications and thus, these alloys have been avoided. Recent advances in alloy "doping" have opened the door to revisit Sn/Bi alloys as a possible alternative to SAC-305 for many applications. We tested the manufacturability and reliability of three low-temperature and one SAC-305 (used as a control) solder paste materials. Two of these materials are doped Sn/Bi/Ag and one is just Sn/Bi/Ag1%. We will discuss the tests and related results. And lastly, we will discuss the prospects, applications and possible implications (based on this evaluation) of these materials together with future actions.
Technical Library | 2010-05-06 18:46:29.0
Stencil printing technology has come a long way since the early 80’s when SMT process gained importance in the electronics packaging industry. In those early days, components were fairly large, making the board design and printing process relatively simple. The current trend in product miniaturization has led to smaller and more complex board designs. This has resulted into designs with maximum area utilization of the board space. It is not uncommon, especially for hand held devices, to find components only a few millimeters from the edge of the board. The board clamping systems used in the printing process have become a significant area of concern based on the current board design trend.
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