Technical Library: calculating aoi cycle time (Page 1 of 1)

Maximal Performance Through Vacuum Potting

Technical Library | 2021-07-28 18:35:13.0

The performance of electronic components is compromised by factors such as bubbles in the potting medium. Increasing numbers of applications – particularly in the automotive and electronics industries – therefore require completely bubble-free dispensing methods. This is where potting in a vacuum comes into focus. The widespread school of thought about this technology is that it is too complicated, too expensive and too slow. But a closer look shows that this view is incorrect. This is a mastered technology. As for costs, the calculation basis is key, since usually the potting and vacuum method is only considered after the required potting quality cannot be achieved reliably any other way. Under total cost of ownership assessments, higher system costs no longer play a key role, since component failure would result in much higher subsequent costs. And now there are proven solutions for high production volumes and/or shorter cycle times. This whitepaper explains when potting in a vacuum is ideal for your projects and what to be aware of.

Scheugenpflug Inc.

Heat Sink Induced Thermomechanical Joint Strain in QFN Devices

Technical Library | 2024-07-24 00:51:44.0

A blade server system (BSS) utilizes voltage regulator modules (VRMs), in the form of quad flat no-lead (QFN) devices, to provide power distribution to various components on the system board. Depending on the power requirements of the circuit, these VRMs can be mounted as single devices or banked together. In addition, the power density of the VRM can be high enough to warrant heat dissipation through the use of a heat sink. Typically, at field conditions (FCs), the BSS are powered on and off up to four times per day, with their ambient temperature cycling between 258C and 808C. This cyclical temperature gradient drives inelastic strain in the solder joints due to the coefficient of thermal expansion (CTE) mismatch between the QFN and the circuit card. In addition, the heat sink, coupled with the QFN and the circuit card, can induce additional inelastic solder joint strain, resulting in early solder joint fatigue failure. To understand the effect of the heat sink mounting, a FEM (finite element model of four QFNs mounted to a BSS circuit card was developed. The model was exercised to calculate the maximum strain energy in a critical joint due to cyclic strain, and the results were compared for a QFN with and without a heat sink. It was determined that the presence of the heat sink did contribute to higher strain energy and therefore could lead to earlier joint failure. Although the presence of the heat sink is required, careful design of the mounting should be employed to provide lateral slip, essentially decoupling the heat sink from the QFN joint strain. Details of the modeling and results, along with DIC (digital image correlation) measurements of heat sink lateral slip, are presented.

IBM Corporation

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