Technical Library | 2023-08-02 18:18:23.0
As six sigma (6) and better processes are demanded for higher yields and as organizations move from measuring defects in terms of parts-per-million (ppm) towards parts-per-billion (ppb), the resolution of extant control charts is becoming insufficient to monitor process quality. This work describes the development of a new statistical process control (SPC) chart that is used to monitor processes in terms of defects-per-billion-opportunities (dpbo). A logical extension of the defects-per-million-opportunities (dpmo) control chart, calculations used to derive the dpbo control limits will be presented and examples of in-control and out-of-control processes will be offered.
Technical Library | 1999-05-07 10:14:57.0
This paper describes a model developed to calculate number of redundant good die per wafer. A block redundancy scheme is used here, where the entire defective memory subarray is replaced by a redundant element. A formula is derived to calculate the amount of improvement expected after redundancy. This improvement is given in terms of the ratio of the overall good die per wafer to the original good die per wafer after considering some key factors.
Technical Library | 2007-11-29 17:20:31.0
Programs have been developed to predict the expected yield of flip chip assemblies, based on substrate design and the statistics of actual manufactured boards, as well as placement machine accuracy, variations in bump sizes, and possible substrate warpage. These predictions and the trends they reveal can be used to direct changes in design so that defect levels will fall below the acceptable limits. Shapes of joints are calculated analytically, or when this is not possible, numerically by means of a public domain program called Surface Evolver. The method is illustrated with an example involving the substrate for a flip chip BGA.
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