Technical Library | 2010-06-30 17:43:04.0
As silicon technology advances to enable higher density ASICs, the core logic voltage decreases. The lower voltage, in combination with higher current requirements, requires tighter tolerances on the power supplies. The control of the power supplies from the PCB to the die is the subject of this study. A frequency sweep simulation using typical bypass values shows that a discrete package capacitor is not a significant factor in reducing the chip core power supply fluctuation. A small voltage boost at the PCB supply can provide a more economical solution to managing the device supplies.
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