Technical Library | 2017-11-30 10:29:29.0
Each year the electronics industry is faced with new product designs that call for smaller printed circuit boards (PCBs) to function in more aggressive and rigorous service environments. As demands change, conformal coating is becoming increasingly adopted to ensure PCB reliability in environments where moisture, condensation, dust, dirt, salts, chemicals, abrasion, thermal shock, mechanical shock, and other factors can all affect circuit performance. This guide reviews the benefits of using light-cure conformal coatings as well as cost justification, typical processing guidelines and best practices, product selection criteria, data, and industry specifications.
Technical Library | 2018-10-10 21:26:52.0
Printed electronics is a familiar term that is taking on more meaning as the technology matures. Flexible electronics is sometimes referred to as a subset of this and the printing approach is one of the enabling factors for roll to roll processes. Printed electronics is improving in performance and has many applications that compete directly with printed circuit boards. The advantage of roll to roll is the speed of manufacturing, the large areas possible, and a reduction in costs. As this technology continues to mature, it is also merging with the high profile 3D printing. (...)This paper will show working demonstrations of printed circuit structures, the obstacles, and the potential future of 3D printed electronics.
Technical Library | 2021-10-12 18:01:49.0
The existence of counterfeit products, e.g., integrated circuits (ICs) and printed circuit boards (PCBs), in the modern semiconductor supply chain has seriously jeopardized the security and reliability of electronic systems, and has also caused the loss of suppliers' profit and reputation. Most of existing research papers prevent or detect counterfeit IC and PCB substrate separately, without testing the PCB as a whole, and often require the assistance of external equipment. In this article, a novel ring oscillator- based PCB authentication (ROPA) methodology to detect counterfeit PCB through supply chain is proposed, which ...
Technical Library | 2016-09-15 17:10:40.0
This paper describes the purpose, methodology, and results to date of thermal endurance testing performed at the company. The intent of this thermal aging testing is to establish long term reliability data for printed wiring board (PWB) materials for use in applications that require 20+ years (100,000+ hours) of operational life under different thermal conditions. Underwriters Laboratory (UL) testing only addresses unclad laminate (resin and glass) and not a fabricated PWB that undergoes many processing steps, includes copper and plated through holes, and has a complex mechanical structure. UL testing is based on a 5000 hour expected operation life of the electronic product. Therefore, there is a need to determine the dielectric breakdown / degradation of the composite printed circuit board material and mechanical structure over time and temperature for mission critical applications.
Technical Library | 2009-12-23 16:55:08.0
Leading up to the development of lead-free soldering alloys, Horizontal Convection* was developed for the reflow process. Getting the correct temperature profile, with the narrow process window in lead-free applications, is now more important than ever. In each chamber or zone, air is circulated toward one side of the oven above the PCB and toward the opposite side of the oven below the PCB, forming a cyclone around the board. The forced air circulation results in a uniform temperature profile along the entire circuit board assembly. This technology is ideal for the precise profiles needed for lead free soldering.
Technical Library | 2020-01-01 17:06:52.0
The majority of electronic failures occur due to thermally induced stresses and strains caused by excessive differences in coefficients of thermal expansion (CTE) across materials.CTE mismatches occur in both 1st and 2nd level interconnects in electronics assemblies. 1st level interconnects connect the die to a substrate. This substrate can be underfilled so there are both global and local CTE mismatches to consider. 2nd level interconnects connect the substrate, or package, to the printed circuit board (PCB). This would be considered a "board level" CTE mismatch. Several stress and strain mitigation techniques exist including the use of conformal coating.
Technical Library | 2021-08-04 18:46:25.0
The process of printed circuit board assembly (PCBA) involves several machines, such as a stencil printer, placement machine and reflow oven, to solder and assemble electronic components onto printed circuit boards (PCBs). In the production flow, some failure prevention mechanisms are deployed to ensure the designated quality of PCBA, including solder paste inspection (SPI), automated optical inspection (AOI) and in-circuit testing (ICT). However, such methods to locate the failures are reactive in nature, which may create waste and require additional effort to be spent re-manufacturing and inspecting the PCBs. Worse still, the process performance of the assembly process cannot be guaranteed at a high level. Therefore, there is a need to improve the performance of the PCBA process. To address the aforementioned challenges in the PCBA process, an intelligent assembly process improvement system (IAPIS) is proposed, which integrates the k-means clustering method and multi-response Taguchi method to formulate a pro-active approach to investigate and manage the process performance.
Technical Library | 2021-09-15 19:00:35.0
This paper presents the use of physics of failure (PoF) methodology to infer fast and accurate lifetime predictions for power electronics at the printed circuit board (PCB) level in early design stages. It is shown that the ability to accurately model silicon–metal layers, semiconductor packaging, printed circuit boards (PCBs), and assemblies allows, for instance, the prediction of solder fatigue failure due to thermal, mechanical, and manufacturing conditions. The technique allows a lifecycle prognosis of the PCB, taking into account the environmental stresses it will encounter during the period of operation. Primarily, it involves converting an electronic computer aided design (eCAD) circuit layout into computational fluid dynamic (CFD) and finite element analysis (FEA) models with accurate geometries. From this, stressors, such as thermal cycling, mechanical shock, natural frequency, and harmonic and random vibrations, are applied to understand PCB degradation, and semiconductor and capacitor wear, and accordingly provide a method for high-fidelity power PCB modelling, which can be subsequently used to facilitate virtual testing and digital twinning for aircraft systems and sub-systems.
Technical Library | 2015-12-17 17:24:17.0
Product quality can be improved through proper application of design for test (DFT) strategies. With today's shrinking product sizes and increasing functionality, it is difficult to get good test coverage of loaded printed circuit boards due to the loss of test access. Advances in test techniques, such as boundary scan, help to recover this loss of test coverage. However, many of these test techniques need to be designed into the product to be effective.This paper will discuss how to maximize the benefits of boundary scan test, including specific examples of how designers should select the right component, connect multiple boundary scan components in chains, add test access to the boundary scan TAP ports, etc. A discussion of DFT guidelines for PCB layout designers is also included. Finally, this paper will include a description of some advanced test methods used in in-circuit tests, such as vectorless test and special probing methods, which are implemented to improve test coverage on printed circuit boards with limited test access.
Technical Library | 2023-12-18 21:07:29.0
Selective soldering utilises a nozzle to apply solder to components on the underside of printed circuit boards (PCBs). This nozzle can be moved to either perform dips (depositing solder to a single component) or draws (applying solder to several components in a single movement). The selective soldering methodology thereby allows the process to be tailored to specific joints and allows multiple nozzle types to be used if required on the circuit board. Nozzles can vary by size (internal diameter) and shape (making them suitable for different process types). This is all dictated by board design and process requirements. Selection of the nozzle type is dependent upon the product to be soldered and the desired cycle time. Examples of different nozzle types are shown here. Hand-load selective systems must be programmed with the parameters for multiple solder joints. However, many in-line systems are designed to be modular. This modularity allows for multiple solder stations with different conditions/nozzles to achieve low cycle times. Figure 1 shows the two distinct types of selective soldering systems offered by Pillarhouse International Ltd.
