Technical Library | 2013-08-22 14:28:58.0
Tin-rich solders are widely applied in the electronic industry in the majority of modern printed circuit boards (PCBs). Because the use of lead-tin solders has been banned in the European Union since 2006, the problem of the bridging of adjacent conductors due to tin whisker growth (limited before by the addition of Pb) has been reborn. In this study tin alloys soldered on glass-epoxy laminate (typically used for PCBs) are considered. Scanning ion microscopy with Focused Ion Beam (FIB) system and energy-dispersive X-ray spectroscopy (EDXS) were used to determine correlations between spatial non-uniformities of the glass-epoxy laminate, the distribution of intermetallic compounds and whisker growth.
Technical Library | 2015-10-01 16:12:51.0
Solder paste printing is known to be one of the most difficult processes to quality assure in electronic manufacturing. The challenge increases as the technology development moves toward a mix between large modules and small chip components on large and densely populated printed circuit boards. Having a process for quality assurance of the solder paste print is fast becoming a necessity.This article describes a method to ensure quality secured data from both solder paste printers and inspection machines in electronic assembly manufacturing. This information should be used as feedback in order to improve the solder paste printing process.
Technical Library | 2015-12-23 16:57:27.0
The onset of copper barrel cracks is typically induced by the presence of manufacturing defects. In the absence of discernible manufacturing defects, the causes of copper barrel cracks in printed circuit board (PCB) plated through holes is not well understood. Accordingly, there is a need to determine what affects the onset of barrel cracks and then control those causes to mitigate their initiation.The objective of this research is to conduct a design of experiment (DOE) to determine if there is a relationship between PCB fabrication processes and the prevalence of fine barrel cracks. The test vehicle used will be a 16-layer epoxy-based PCB that has two different sized plated through holes as well as buried vias.
Technical Library | 2017-06-29 16:39:30.0
Currently there is no industry standard test method for measuring dielectric properties of circuit board materials at frequencies greater than about 10 GHz. Various materials vendors and test labs take different approaches to determine these properties. It is common for these different approaches to yield varying values of key properties like permittivity and loss tangent. The D-24C Task Group of IPC has developed this round robin program to assess these various methods from the "bottom up" to determine if standardized methods can be agreed upon to provide the industry with more accurate and valid characteristics of dielectrics used in high-frequency and high-speed applications.
Technical Library | 2017-09-28 16:36:33.0
These nano-coatings also refine the solder paste brick shape giving improved print definition. These two benefits combine to help the solder paste printing process produce an adequate amount of solder paste in the correct position on the circuit board pads. Today, stencil aperture area ratios from 0.66 down to 0.40 are commonly used and make paste printing a challenge. This paper presents data on small area ratio printing for component designs including 01005 Imperial (0402 metric) and smaller 03015 metric and 0201 metric chip components and 0.3 mm and 0.4 mm pitch micro BGAs.
Technical Library | 2019-06-26 23:21:49.0
Copper-filled micro-vias are a key technology in high density interconnect (HDI) designs that have enabled increasing miniaturization and densification of printed circuit boards for the next generation of electronic products. Compared with standard plated through holes (PTHs) copper filled vias provide greater design flexibility, improved signal performance, and can potentially help reduce layer count, thus reducing cost. Considering these advantages, there are strong incentives to optimize the via filling process. This paper presents an innovative DC acid copper via fill formulation, for VCP (Vertical Continues Plating) applications which rapidly fills vias while minimizing surface plating.
Technical Library | 2021-09-01 15:31:39.0
The long-standing trend in the electronics industry has been the miniaturization of electronic components. It is projected that this trend will continue as Original Equipment Manufacturers (OEMs) and Electronic Manufacturing Service (EMS) providers strive to reduce "real estate" on printed circuit boards. Typically, the miniaturization of components can be achieved by integration or size reduction. At present, size reduction is considered to be more cost effective and flexible than integration. Passive components, which are used in limiting current, terminating transmission lines and de-coupling switching noise, are the primary focus in size reduction due to their variety of uses.
Technical Library | 2021-10-06 17:54:32.0
The corrosion of Nickel-Palladium-Gold (Ni-Pd-Au) finish terminals in humid environments is known to be reduced with the application of a conformal coating such as acrylic. Corrosion has a higher rate of occurrence around the terminal 'knee' of a surface mount component, which may be reduced with the application of conformal coatings. Although radio frequency (RF) plasma processing is generally known to enhance conformity of conformal coating to surfaces through ionic bombardment, the effect on the functionality of assembled printed circuit boards (PCB) is not as well known. The purpose of this study is to assess whether RF plasma processing can enhance the adhesive and coverage qualities of an acrylic conformal coating on PCBs
Technical Library | 2021-06-07 19:03:05.0
The waste from end-of-life electrical and electronic equipment has become the fastest growing waste problem in the world. The difficult-to-treat waste-printed circuit boards (WPCBs), which are nearly 3−6 wt % of the total electronic waste, generate great environmental concern nowadays. For WPCB treatment and recycling, the mechanical−physical method has turned out to be more technologically and economically feasible. In this work, the mechanical−physical treatment and recycling technologies for WPCBs were investigated, and future research was directed as well. Removing electric and electronic components(EECs) from WPCBs is critical for their crushing and metal recovery; however, environmentally friendly and high-efficiency removal techniques need be developed. Concentrated metals rich in Cu, Al, Au, Pb, and Sn recovered from WPCBs need be further refined to add to their economic values. The low value added nonmetallic fraction of waste-printed circuit boards (NMF-WPCBs) accounts for approximately 60 wt % of the WPCBs. From the perspective of environmental management, a zero-waste approach to recycling them should be developed to gain values. Preparing polymer composites and geopolymers offers many advantages and has potential applications in various fields, especially as construction and building materials. However, the mechanical and thermal properties of NMF-WPCBs composites should be further improved for preparing polymer composites. Surface modification or filler blending could be applied to improve the interfacial comparability between NMF-WPCBs and the polymer matrix. The NMFWPCBs shows potential in preparing cement mortar and geological polymers, but the environmental safety resulting from metals needs to be taken into account. This study will provide a significant reference for the industrial recycling of NMF-WPCBs
Technical Library | 2014-04-03 18:01:13.0
A system level modeling methodology is presented and validated on a simple case. It allows precise simulations of electrostatic discharge (ESD) stress propagation on a printed circuit board (PCB). The proposed model includes the integrated circuit (IC) ESD protection network, IC package, PCB lines, passives components, and externals elements. The impact of an external component on the ESD propagation paths into an IC is demonstrated. Resulting current and voltage waveforms are analyzed to highlight the interactions between all the elements of an operating PCB. A precise measurement technique was designed and used to compare with the simulation results. The model proposed in this paper is able to predict, with good accuracy, the propagation of currents and voltages into the whole system during ESD stress. It might be used to understand why failures occur and how to fix them with the most suitable solution.
