Technical Library | 2013-03-14 17:19:28.0
Commercial-off-the-shelf ball/column grid array packaging (COTS BGA/CGA) technologies in high reliability versions are now being considered for use in a number of National Aeronautics and Space Administration (NASA) electronic systems. Understanding the process and quality assurance (QA) indicators for reliability are important for low-risk insertion of these advanced electronic packages. This talk briefly discusses an overview of packaging trends for area array packages from wire bond to flip-chip ball grid array (FCBGA) as well as column grid array (CGA). It then presents test data including manufacturing and assembly board-level reliability for FCBGA packages with 1704 I/Os and 1-mm pitch, fine pitch BGA (FPBGA) with 432 I/Os and 0.4-mm pitch, and PBGA with 676 I/Os and 1.0-mm pitch packages. First published in the 2012 IPC APEX EXPO technical conference proceedings.
Technical Library | 2017-06-22 17:11:53.0
C-mode scanning acoustic microscopy (C-SAM) is a non-destructive inspection technique showing the internal features of a specimen by ultrasound. The C-SAM is the preferred method for finding “air gaps” such as delamination, cracks, voids, and porosity. This paper presents evaluations performed on various advanced packages/assemblies especially flip-chip die version of ball grid array/column grid array (BGA/CGA) using C-SAM equipment. For comparison, representative x-ray images of the assemblies were also gathered to show key defect detection features of the two non-destructive techniques.
Technical Library | 2019-07-30 15:29:50.0
Area Array microelectronic packages with small pitch and large I/O counts are now widely used in microelectronics packaging. The impact of various package design and materials/process parameters on reliability has been studied through extensive literature review. Reliability of Ceramic Column Grid Array (CCGA) package assemblies has been evaluated using JPL thermal cycle test results (-50°/75°C, -55°/100°C, and -55°/125°C), as well as those reported by other investigators. A sensitivity analysis has been performed using the literature data to study the impact of design parameters and global/local stress conditions on assembly reliability. The applicability of various life-prediction models for CCGA design has been investigated by comparing model's predictions with the experimental thermal cycling data. Finite Element Method (FEM) analysis has been conducted to assess the state of the stress/strain in CCGA assembly under different thermal cycling, and to explain the different failure modes and locations observed in JPL test assemblies.
Technical Library | 2013-08-14 14:06:48.0
This paper discusses how to successfully profile a printed circuit board when reworking Ball Grid Array and Chip Scale Packages.
Technical Library | 2015-02-05 23:23:40.0
Ball grid arrays are the boon and bane of engineers and printed circuit board designers the world over. Their unparalleled pin density and low lead inductance are essential in today's high pin count, high frequency integrated circuits. However, that same pin density and unique interface create a challenge unique unto themselves. These challenges need to be faced head on since the ball grid array (BGA) is prevalent in modern PCBs. While there are entire textbooks that cover the topic of BGAs, their use and fanout techniques, the quick overview provided here offers an engineer a good starting point for improving BGA designs.
Technical Library | 2011-12-29 17:33:21.0
2011 IPC APEX EXPO Conference Article: Surface mount area arrays (SMAA) have been in existence for decades and are increasingly becoming more important as printed circuit board (PCB) assemblies become further complex with package miniaturization and densi
Technical Library | 2021-12-16 01:33:11.0
Ball Grid Array devices, BGAs, are widely used in a vast range of products including consumer, telecommunications and office based systems. As an area array device of solder joints, it provides high packing density with a relatively easy introduction cycle. However, over the last couple of years engineers have started to experiment, and in some cases implement, stacked packages, of the type often called Package on Package, or POP. In simple terms, POP devices are the stacking of components, one on top of the other, either during the original component manufacture or during printed board assembly.
Technical Library | 2006-11-01 22:37:23.0
Flip Chip Plastic Ball Grid Array (FCPBGA) modules, when subjected to extreme environmental stress testing, may often reveal mechanical and electrical failure mechanisms which may not project to the field application environment. One such test can be the Deep Thermal Cycle (DTC) environmental stress which cycles from -55°C to 125°C. This “hammer” test provides the customer with a level of security for robustness, but does not typically represent conditions which a module is likely to experience during normal handling and operation.
Technical Library | 2013-03-21 21:24:49.0
This paper explores the behaviour of a copper test vehicle with multiple reflowed solder joints, which has direct relevance to ball grid arrays (BGA) and high density interconnect structures. The paper explores the relative stress conditions on the distributed joints and the sensitivity to ball joint shape... First published in the 2012 IPC APEX EXPO technical conference proceedings
Technical Library | 2019-04-17 21:29:14.0
Electroless nickel electroless palladium immersion gold (ENEPIG) surface finish for printed circuit board (PCB) has now become a key surface finish that is used for both tin-lead and lead-free solder assemblies. This paper presents the reliability of land grid array (LGA) component packages with 1156 pads assembled with tin-lead solder onto PCBs with an ENEPIG finish and then subjected to thermal cycling and then isothermal aging.
