Technical Library | 2023-09-07 14:54:10.0
A global manufacturer of a broad line of electronic interconnect solutions worked with us to dispense conductive adhesive EpoTek H20E-FC. EpoTek H20E-FC is a two-component, electrically conductive, snap curing epoxy for photovoltaic thin film module stringing, semiconductor packaging and PCB circuit assembly. The primary goal was filling a rectangular cavity on a connector. The epoxy needed to fill the connector to the top of the walls in less than three seconds.
Technical Library | 2023-08-16 18:02:27.0
One of our customers in the medical industry requested dam and fill application testing on a Kapton substrate. The material needed to be non-conductive for dispensing around electrical components, acting as structural support. Ultimately the product will be folded, therefore the footprint had to be small.
Technical Library | 2020-07-15 18:29:34.0
In the early 2000s the first fine-pitch ball grid array devices became popular with designers looking to pack as much horsepower into as small a space as possible. "Smaller is better" became the rule and with that the mechanical drilling world became severely impacted by available drill bit sizes, aspect ratios, and plating methodologies. First of all, the diameter of the drill needed to be in the 0.006" or smaller range due to the reduction of pad size and spacing pitch. Secondly, the aspect ratio (depth to diameter) became limited by drill flute length, positional accuracy, rigidity of the tools (to prevent breakage), and the throwing power of acid copper plating systems. And lastly, the plating needed to close up the hole as much as possible, which led to problems with voiding, incomplete fill, and gas/solution entrapment.
Technical Library | 2020-07-15 18:49:03.0
Via Filling • Through Hole Vias - IPC-4761 – Plugging – Filling – Filled & Capped • MicroviaFilling and Stacked Vias
Technical Library | 2021-05-26 00:53:26.0
This paper describes a copper electroplating enabling technology for filling microvias. Driven by the need for faster, smaller and higher performance communication and electronic devices, build-up technology incorporating microvias has emerged as a viable multilayer printed circuit manufacturing technology. Increased wiring density, reduced line widths, smaller through-holes and microvias are all attributes of these High Density Interconnect (HDI) packages. Filling the microvias with conductive material allows the use of stacked vias and via in pad designs thereby facilitating additional packaging density. Other potential design attributes include thermal management enhancement and benefits for high frequency circuitry. Electrodeposited copper can be utilized for filling microvias and provides potential advantages over alternative via plugging techniques. The features, development, scale up and results of direct current (DC) and periodic pulse reverse (PPR) acid copper via filling processes, including chemistry and equipment, are described.
Technical Library | 2024-07-24 01:27:58.0
A study of the Thermo Design PCB Indicates The better the performance of the heatsink (=low Rth), the more influence the TIMs have The thickness of a TIM is often more critical than the thermal conductivity of the material The thermal resistance of the surface between the materials are most critical Better use many small vias than a few big vias! Plated or filled vias are very expensive to get, better try to stay with standard!
Technical Library | 2019-06-26 23:21:49.0
Copper-filled micro-vias are a key technology in high density interconnect (HDI) designs that have enabled increasing miniaturization and densification of printed circuit boards for the next generation of electronic products. Compared with standard plated through holes (PTHs) copper filled vias provide greater design flexibility, improved signal performance, and can potentially help reduce layer count, thus reducing cost. Considering these advantages, there are strong incentives to optimize the via filling process. This paper presents an innovative DC acid copper via fill formulation, for VCP (Vertical Continues Plating) applications which rapidly fills vias while minimizing surface plating.
Technical Library | 2016-03-03 17:25:26.0
This paper discusses a nano copper based paste for use in via filling. The company manufactures nano copper and disperses the coated nano copper into a paste in combination with micron copper. The resultant paste is injected or fills a via. The via is subsequently sintered by means of photonic sintering, or by heat in a reducing environment. The process will be accomplished in under an hour and results in filled solid copper vias.
Technical Library | 2011-02-17 18:03:21.0
Copper ground pours are created by filling open unused areas with copper generally on the outer layers of the board then connecting the copper fill with stitching vias to ground. Usually, small isolated areas
Technical Library | 2007-11-01 17:16:07.0
This paper discusses micro-filled epoxy-based conducting adhesives modified with nanoparticles, conducting polymers, and low melting point (LMP) fillers for z-axis interconnections, especially as they relate to package level fabrication, integration,
