Technical Library: copper delamination (Page 1 of 1)

Influence of Plating Quality on Reliability of Microvias

Technical Library | 2016-05-12 16:29:40.0

Advances in miniaturized electronic devices have led to the evolution of microvias in high density interconnect (HDI) circuit boards from single-level to stacked structures that intersect multiple HDI layers. Stacked microvias are usually filled with electroplated copper. Challenges for fabricating reliable microvias include creating strong interface between the base of the microvia and the target pad, and generating no voids in the electrodeposited copper structures. Interface delamination is the most common microvia failure due to inferior quality of electroless copper, while microvia fatigue life can be reduced by over 90% as a result of large voids, according to the authors’ finite element analysis and fatigue life prediction. This paper addresses the influence of voids on reliability of microvias, as well as the interface delamination issue.

CALCE Center for Advanced Life Cycle Engineering

Understanding and optimizing delamination/recycling of printed circuit boards using a supercritical carbon dioxide process

Technical Library | 2024-09-02 17:01:54.0

A printed circuit board (PCB) is an integral component of any electronic product and is among the most challenging components to recycle. While PCB manufacturing processes undergo generations of innovation and advancement with 21st century technologies, the recycling of PCBs primarily employs 1920's shredding and separation technologies. There is a critical need for alternative PCB recycling routes to satisfy the increasing environmental demands. Previous work has developed an environmentally benign supercritical fluid process that successfully delaminated the PCB substrates and separated the PCB layers. While this work was successful in delamination of the PCB substrates, further understanding is needed to maximize the interactions between the supercritical fluid and PCB for an optimal processing scenario. As such, this research presents an exploratory study to further investigate the supercritical fluid PCB recycling process by using supercritical carbon dioxide and an additional amount of water to delaminate PCB substrates. The focus of this study is to test delamination success at low temperature and pressure supercritical conditions in comparison to the previous studies. Furthermore, material characterization methods, such as differential scanning calorimetry, dynamic mechanical analysis, and Fourier transform infrared spectroscopy, are included to study the delaminating mechanisms. Results from the recycling process testing showed that the PCB substrates delaminated easily and could be further separated into copper foils, glass fibers and polymers. Surprisingly, the material characterization suggested that there were no significant changes in glass transition temperature, crosslink density, and FTIR spectra of the PCBs before and after the supercritical fluid process.

Arizona State University

Guidelines/recommendations "Drying of PCBs before soldering"

Technical Library | 2024-02-05 17:51:01.0

Objective:  Drying = reducing the humidity in PCB before soldering  Preventing delamination caused by thermal stress after moisture absorption Methods:  Drying in convection and/ or vacuum oven  Parameters subject to material type, soldering surface, layer count, time to soldering, layout (copper-plated areas)

ZVEI - German Electro and Digital Industry Association

Pb-Free Reflow, PCB Degradation, and the Influence of Moisture Absorption

Technical Library | 2024-09-02 17:31:09.0

The cracking and delamination of printed circuit boards (PCB) during exposure to elevated thermal exposure, such as reflow and rework, have always been a concern for the electronics industry. However, with the increasing spread of Pb-free assembly into industries with lower volume and higher complexity, the occurrence of these events is increasing in frequency. Several telecom and enterprise original equipment manufacturers (OEMs) have reported that the robustness of their PCBs is their number one concern during the transition from SnPb to Pb-free product. Cracking and delamination within PCBs can be cohesive or adhesive in nature and can occur within the weave, along the weave, or at the copper/epoxy interface (see Figure 1). The particular role of moisture absorption and other PCB material properties, such as out of plane expansion on this phenomenon is still being debated.

DfR Solutions (acquired by ANSYS Inc)

Moisture Measurements in PCBs and Impact of Design on Desorption Behaviour

Technical Library | 2018-09-21 10:12:53.0

Moisture accumulates during storage and industry practice recommends specific levels of baking to avoid delamination. This paper will discuss the use of capacitance measurements to follow the absorption and desorption behaviour of moisture. The PCB design used in this work, focused on the issue of baking out moisture trapped between copper planes. The PCB was designed with different densities of plated through holes and drilled holes in external copper planes, with capacitance sensors located on the inner layers. For trapped volumes between copper planes, the distance between holes proved to be critical in affecting the desorption rate. For fully saturated PCBs, the desorption time at elevated temperatures was observed to be in the order of hundreds of hours. Finite difference diffusion modelling was carried out for moisture desorption behaviour for plated through holes and drilled holes in copper planes. A meshed copper plane was also modelled evaluating its effectiveness for assisting moisture removal and decreasing bake times. Results also showed, that in certain circumstances, regions of the PCB under copper planes initially increase in moisture during baking.

National Physical Laboratory

Reliability of Embedded Planar Capacitors under Temperature and Voltage Stress

Technical Library | 2015-05-21 18:46:31.0

In this work the reliability of an embedded planar capacitor laminate under temperature and voltage stress is investigated. The capacitor laminate consisted of an epoxy-BaTiO3 composite sandwiched between two layers of copper. The test vehicle with the embedded capacitors was subjected to a temperature of 125oC and a voltage bias of 200 V for 1000 hours. Capacitance, dissipation factor, and insulation resistance were monitored in-situ. Failed capacitors exhibited a sharp drop in insulation resistance, indicating avalanche breakdown. The decrease in the capacitance after 1000 hours was no more than 8% for any of the devices monitored. The decrease in the capacitance was attributed to delamination in the embedded capacitor laminate and an increase in the spacing between the copper layers.

CALCE Center for Advanced Life Cycle Engineering

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