Technical Library | 2012-05-03 20:40:10.0
First published in the 2012 IPC APEX EXPO technical conference proceedings. Increased pressures to reduce time to market and time to volume have forced many manufacturers of populated printed circuit boards to rely on capacitively coupled, un-powered, vec
Technical Library | 1999-05-07 08:04:23.0
Stereolithography is a handy tool not only for speeding a design to market but also in giving customers an early edge. By allowing a form-and-fit sample to be quickly made from a computer model, stereolithography coupled with simultaneous engineering allows customers to see product models early in the design cycle. And if a picture is worth a thousand words, what's a tangible sample worth?
Technical Library | 2007-06-13 13:44:10.0
Very high performance computer applications have created a demand for large organic substrates capable of interconnecting one or a few ASIC semiconductor devices with packaged memory devices. The electrical advantages offered by the use of a thin PTFE composite substrate were coupled with intrinsic mechanical advantages to create very high performance applications. The application development required interactions of design, fabrication, and new manufacturing technology to obtain rapid prototype production and allow a successful ensuing manufacturing ramp.
Technical Library | 2013-03-28 16:18:22.0
For the last couple of years, the main concerns regarding the electrical performance of blank PCB boards were impedance and ohmic resistance. Just recently, the need to reduce insertion loss came up in discussions with blank board customers (...) The paper describes the test vehicle and the testing methodology and discusses in detail the electrical performance characteristics. The influence of the independent variables on the performance characteristics is presented. Finally the thermal reliability of the boards built applying different copper foils and oxide replacements was investigated.
Technical Library | 2021-11-16 22:17:27.0
Ultrasonics, coupled with an aqueous detergent process that cleans at below 43ºC, may be best suited for fine-pitch SMT screens and stencils. Aqueous detergents clean more effectively than solvents, with little or no environmental impact. Because of the environmental concerns driving today's technology decisions, the once simple decision of selecting a stencil cleaning process is now clouded with different chemicals, different cleaning machines and various types of solder paste, all with specific environmental, health and safety related issues and regulations.
Technical Library | 2014-06-05 16:44:07.0
Stencil printing capability is becoming more important as the range of component sizes assembled on a single board increases. Coupled with increased component density, solder paste sticking to the aperture sidewalls and bottom of the stencil can cause insufficient solder paste deposits and solder bridging. Yield improvement requires increased focus on stencil technology, printer capability, solder paste functionality and understencil cleaning.(...) The purpose of this research is to study the wipe sequence, wipe frequency and wipe solvent(s) and how these factors interact to provide solder paste printing yield improvement.
Technical Library | 2021-12-16 01:33:11.0
Ball Grid Array devices, BGAs, are widely used in a vast range of products including consumer, telecommunications and office based systems. As an area array device of solder joints, it provides high packing density with a relatively easy introduction cycle. However, over the last couple of years engineers have started to experiment, and in some cases implement, stacked packages, of the type often called Package on Package, or POP. In simple terms, POP devices are the stacking of components, one on top of the other, either during the original component manufacture or during printed board assembly.
Technical Library | 2007-03-28 10:18:33.0
Legislation against the use of lead in electronics has been the driving force behind the use of lead-free solders, surface finishes, and component lead finishes. The major concern in using lead-free solders in the assembly and rework Chip Scale Packages (CSPs) is the relatively high temperatures that the components and the boards experience. Fine-pitch CSPs have very low standoff heights following assembly making inspection and rework of these components more difficult. One other concern pertinent to rework is the temperature of the neighboring components during rework. These issues, coupled with the limitations of rework equipment to handle lead-free reflow temperatures, make the task of reworking lead-free assemblies more challenging.
Technical Library | 2021-09-01 15:31:39.0
The long-standing trend in the electronics industry has been the miniaturization of electronic components. It is projected that this trend will continue as Original Equipment Manufacturers (OEMs) and Electronic Manufacturing Service (EMS) providers strive to reduce "real estate" on printed circuit boards. Typically, the miniaturization of components can be achieved by integration or size reduction. At present, size reduction is considered to be more cost effective and flexible than integration. Passive components, which are used in limiting current, terminating transmission lines and de-coupling switching noise, are the primary focus in size reduction due to their variety of uses.
Technical Library | 2012-12-20 14:36:09.0
The increased function of personal electronic devices, such as mobile phones and personal music devices, has driven the need for smaller and smaller active and passive components. This trend toward miniaturization, occurring at the same time as the conversion to RoHS-compliant lead-free assembly, has been a considerable challenge to the electronics assembly industry. The main reason for this is the higher reflow process temperatures required for Pb-free assembly. These higher temperatures can thermally damage the PCB and the components. In addition, the higher reflow temperatures can negatively affect the solder joint quality, especially when coupled with the smaller paste deposits required for these smaller components. If additional thermal processing is required, the risk increases even more. First Published at SMTA's International Conference on Soldering and Reliability in Toronto, May 2011
