Technical Library | 2019-05-21 17:34:08.0
Flip chip components have been gaining popularity in the electronics industry since their introduction in the 1960s. Advances in attach methods and adhesives, as well as the drive for smaller and faster electronic devices made the technology take off. The basic premise of the flip chip is that the chip (semiconductor device) is mounted flipped from the traditional position. The traditional method of mounting a die is to mount it on a lead frame with the circuit and bond pads face up. The bond pads then receive a bond wire which then connects to the proper lead on the lead frame. Flip chips are mounted face down onto a substrate using small bumps on the bond pads to make direct electrical connection to their respective pads on the substrate. Stay tuned for more information on attachment techniques next month. This article will focus on how to rework flip chips.
Technical Library | 2017-08-31 13:43:48.0
Wire bonded packages using conventional copper leadframe have been used in industry for quite some time. The growth of portable and wireless products is driving the miniaturization of packages resulting in the development of many types of thin form factor packages and cost effective assembly processes. Proper optimization of wire bond parameters and machine settings are essential for good yields. Wire bond process can generate a variety of defects such as lifted bond, cracked metallization, poor intermetallic etc. NSOP – non-stick on pad is a defect in wire bonding which can affect front end assembly yields. In this condition, the imprint of the bond is left on the bond pad without the wire being attached. NSOP failures are costly as the entire device is rejected if there is one such failure on any bond pad. The paper presents some of the failure modes observed and the efforts to address NSOP reduction
Technical Library | 2014-05-08 16:34:16.0
Bare die mounting on multi-device substrates has been in use in the microelectronics industry since the 1960s. The aerospace industry’s hybrid modules and IBM’s Solid Logic Technology were early implementations that were developed in the 1960’s. The technologies progressed on a steady level until the mid 1990’s when, with the advent of BGA packaging and chip scale packages, the microelectronics industry started a wholesale move to area array packaging. This paper outlines the challenges for both traditional wire-bond die attached to a printed wiring board (pwb), to the more recent applications of bumped die attached to a high performance substrate.
| 1 |
COT specializes in high quality SMT nozzles and consumables for pick and place machines. We provide special engineering design service of custom nozzles for those unique and odd components.
2481 Hilton Drive
Gainesville, GA USA
Phone: (770) 538-0411
