Technical Library: cre orders point (Page 1 of 1)

Masking for Conformal Coatings

Technical Library | 2019-12-05 13:30:46.0

Conformal coatings are regularly employed to protect the surface of a soldered printed circuit board assembly from moisture, chemicals in the PCBA's service environment, and foreign objects or debris. Conformal coatings are nonconductive and therefore cannot be placed on any location where electrical contact will be required, such as connector pins, test points, and sockets. Conformal coatings are also not permitted on any mechanical interface location, such as mounting holes or brackets, to assure the proper fit between items in the final assembly. In order to apply conformal coatings to an assembly and comply with the restrictions on keep-out areas, masking is employed to protect those surfaces.

ACI Technologies, Inc.

Experimentation for Success

Technical Library | 2019-05-23 10:27:13.0

The technical tips have offered valuable details and techniques into various aspects of electronics manufacturing. This has been validated by the reader responses concurring with our assessments, offering additional insight, or in some rare cases, stating divergent points of view on any particular matter. In a bit of a strategic departure from the normal range of electronic manufacturing topics, ACI Technologies,Inc. would like our readers to consider the importance of being well prepared in the arena of designed experiments in order to properly qualify a manufacturing process. This particular topic has relevance because of the associated scope of work ACI Technologies encounters in numerous projects from material R&D to manufacturing process optimization, which require appropriate experimental designs to ascertain the significant data.

ACI Technologies, Inc.

The Call for Halogen-Free Electronic Assemblies

Technical Library | 2009-06-17 18:52:27.0

The increased interest in halogen-free assemblies is a result of Non-Government Organizations (NGOs) exerting pressure on electronic equipment manufacturers to eliminate halogens. The NGOs primary focus is on resolving global environmental issues and concerns. As a result of an increase in the enormous "e-waste" dump sites that have begun showing up around the world, NGOs are pushing consumer electronic manufacturers to ban halogen-containing material in order to produce "green" products. Not only are these sites enormous, but the recycling methods are archaic and sometimes even illegal.This stockpiling and dumping has created growing political and environmental issues. In order to deal with this issue, the question of why halogens are a focal point must be addressed.

AIM Solder

Effects Of Surface Finish On High Frequency Signal Loss Using Various Substrate Materials

Technical Library | 2021-07-06 21:24:59.0

The amount of information transferred on wireless networks has increased dramatically with the tremendous growth of mobile phones, Internet access, and hand held devices. In order to build the infrastructure needed to handle ever increasing data transfer, manufacturers of electronic devices turn to high speed, high frequency electronic signals. The need to render these electronic devices portable is another technology driver. The merge of high-frequency signals with small geometry conductive traces means that the topic of signal loss has reached a critical point in existing device production.

MacDermid, Inc.

Make the Right Design Choices in Load Switching and Simulation in a High Current and Mechatronic Functional Test

Technical Library | 2016-02-04 19:11:47.0

In a typical mechatronic manufacturing functional test setup, actual load simulations are usually done by connecting the DUT outputs to power or ground in order to establish either a high or low side driver. Each output is connected with different load and the test will either be sequential or concurrent. At lower power levels, these can usually be managed with general purpose switches. However, when it comes to higher power levels of currents more than 5 amps, such switching and loading might pose a greater challenge. Furthermore, critically in the manufacturing line, the tradeoff between cost and test time would have a great influence on the test strategy.This paper will present some key points to design a cost effective high power switching and load management solution.

Keysight Technologies

Stencil Design for Lead-Free SMT Assembly

Technical Library | 2018-03-05 11:17:31.0

In order to comply with RoHS and WEEE directives, many circuit assemblers are transitioning some or all of their soldering processes from tin-lead to lead-free within the upcoming year. There are no drop-in replacement alloys for tin-lead solder, which is driving a fundamental technology change. This change is forcing manufacturers to take a closer look at everything associated with the assembly process: board and component materials, logistics and materials management, solder alloys and processing chemistries, and even soldering methods. Do not expect a dramatic change in soldering behavior when moving to lead-free solders. The melting points of the alloys are higher, but at molten temperatures the different alloys show similar behaviors in a number of respects. Expect subtler changes, especially near the edges of a process window that is assumed based on tin-lead experience rather than defined through lead-free experimentation. These small changes, many of them yet to be identified and understood, will manifest themselves with lower assembly yields. The key to keeping yields up during the transition to lead-free is quickly learning what and where the subtle distinctions are, and tuning the process to accommodate them.

Cookson Electronics

Innovative Electroplating Processes for IC Substrates - Via Fill, Through Hole Fill, and Embedded Trench Fill

Technical Library | 2021-06-21 19:34:02.0

In this era of electronics miniaturization, high yield and low-cost integrated circuit (IC) substrates play a crucial role by providing a reliable method of high density interconnection of chip to board. In order to maximize substrate real-estate, the distance between Cu traces also known as line and space (L/S) should be minimized. Typical PCB technology consists of L/S larger than 40 µ whereas more advanced wafer level technology currently sits at or around 2 µm L/S. In the past decade, the chip size has decreased significantly along with the L/S on the substrate. The decreasing chip scales and smaller L/S distances has created unique challenges for both printed circuit board (PCB) industry and the semiconductor industry. Fan-out panel-level packaging (FOPLP) is a new manufacturing technology that seeks to bring the PCB world and IC/semiconductor world even closer. While FOPLP is still an emerging technology, the amount of high-volume production in this market space provide a financial incentive to develop innovative solutions in order to enable its ramp up. The most important performance aspect of the fine line plating in this market space is plating uniformity or planarity. Plating uniformity, trace/via top planarity, which measures how flat the top of the traces and vias are a few major features. This is especially important in multilayer processing, as nonuniformity on a lower layer can be transferred to successive layers, disrupting the device design with catastrophic consequences such as short circuits. Additionally, a non-planar surface could also result in signal transmission loss by distortion of the connecting points, like vias and traces. Therefore, plating solutions that provide a uniform, planar profile without any special post treatment are quite desirable.

MacDermid Inc.

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