Technical Library | 2017-07-27 16:51:57.0
Reliability Expectations of Highly Dense Electronic Assemblies is commonly validated using Ion Chromatography and Surface Insulation Resistance. Surface Insulation Resistance tests resistance drops on both cleaned and non-cleaned circuit assemblies. It is well documented in the literature that SIR detects ionic residue and the potential of this residue to cause leakage currents in the presence of humidity and bias. Residues under leadless components are hard to inspect for and to ensure flux residue is totally removed. The question many assemblers consider is the risk of residues that may still be present under the body of components.
Technical Library | 2021-08-18 01:30:18.0
The interfacing of soft and hard electronics is a key challenge for flexible hybrid electronics. Currently, a multisubstrate approach is employed, where soft and hard devices are fabricated or assembled on separate substrates, and bonded or interfaced using connectors; this hinders the flexibility of the device and is prone to interconnect issues. Here, a single substrate interfacing approach is reported, where soft devices, i.e., sensors, are directly printed on Kapton polyimide substrates that are widely used for fabricating flexible printed circuit boards (FPCBs).
Technical Library | 2016-02-04 19:11:47.0
In a typical mechatronic manufacturing functional test setup, actual load simulations are usually done by connecting the DUT outputs to power or ground in order to establish either a high or low side driver. Each output is connected with different load and the test will either be sequential or concurrent. At lower power levels, these can usually be managed with general purpose switches. However, when it comes to higher power levels of currents more than 5 amps, such switching and loading might pose a greater challenge. Furthermore, critically in the manufacturing line, the tradeoff between cost and test time would have a great influence on the test strategy.This paper will present some key points to design a cost effective high power switching and load management solution.
Technical Library | 2009-01-01 16:37:38.0
Recent technology advancement has enabled enhancement in PWB electrical performance and wiring density. These innovations have taken the form of improved materials, novel PWB interconnect structures, and manufacturing technology. One such advancement is Z-axis conductive interconnect. The Z-interconnect technology involves building mini-substrates of 2 or 3 layers each, then assembling several mini-substrates together using conductive paste.
Technical Library | 2020-03-12 13:10:35.0
The electronics industry is further progressing in terms of smaller, faster, smarter and more efficient electronic devices. This continuous evolving environment caused the development on various electrolytic copper processes for different applications over the past several decades. (...) This paper describes the reasons for development and a roadmap of dimensions for copper filled through holes, microvias and other copper plated structures on PCBs.
Technical Library | 2016-11-30 15:53:15.0
The use of microvias in Printed Circuit Boards (PCBs) for military hardware is increasing as technology drives us toward smaller pitches and denser circuitry. Along with the changes in technology, the industry has changed and captive manufacturing lines are few and far between. As PCBs get more complicated, the testing we perform to verify the material was manufactured to our requirements before they are used in an assembly needs to be reviewed to ensure that it is sufficient for the technology and meets industry needs to better screen for long-term reliability. The Interconnect Stress Testing (IST) protocol currently used to identify manufacturing issues in plated through holes, blind, or buried vias are not necessarily sufficient to identify problems with microvias. There is a need to review the current IST protocol to determine if it is adequate for finding bad microvias or if there is a more reliable test that will screen out manufacturing inconsistencies. The objective of this research is to analyze a large population of PCB IST coupons to determine if there is a more effective IST test to find less reliable microvias in electrically passing PCB product and to screen for manufacturing deficiencies. The proposed IST test procedure will be supported with visual inspection of corresponding microvia cross sections and Printed Wiring Assembly (PWA) acceptance test results. The proposed screening will be shown to only slightly affect PCB yield while showing a large benefit to screening before PCBs are used in an assembly.
Technical Library | 2017-03-02 18:13:05.0
The need for more energy-efficient solid-state switches beyond complementary metal-oxide-semiconductor (CMOS) transistors has become a major concern as the power consumption of electronic integrated circuits (ICs) steadily increases with technology scaling. Nano-Electro-Mechanical (NEM) relays control current flow by nanometer-scale motion to make or break physical contact between electrodes, and offer advantages over transistors for low-power digital logic applications: virtually zero leakage current for negligible static power consumption; the ability to operate with very small voltage signals for low dynamic power consumption; and robustness against harsh environments such as extreme temperatures. Therefore, NEM logic switches (relays) have been investigated by several research groups during the past decade. Circuit simulations calibrated to experimental data indicate that scaled relay technology can overcome the energy-efficiency limit of CMOS technology. This paper reviews recent progress toward this goal, providing an overview of the different relay designs and experimental results achieved by various research groups, as well as of relay-based IC design principles. Remaining challenges for realizing the promise of nano-mechanical computing, and ongoing efforts to address these, are discussed.
Technical Library | 2019-09-25 04:36:01.0
What is the main function of hot air dry oven? Drying ovens are devices used to remove moisture and other solvents from the items placed inside them through a forced convection process, collecting it elsewhere so that the object becomes dehydrated. A drying oven causes objects to dry out through evaporation. Drying ovens use convection heating,also called air forced, in which the object is heated through air currents. Water from the object escapes into the air, raising the humidity level and causing the semi-solid membranes inside the oven to absorb the water. The end result is that the oven removes water from the object being dried, leaving it dehydrated. Drying ovens contain a system for forcing convection currents to develop, usually either a fan or turbine, which aids in the heating and drying process by ensuring that the hot air circulates,many ovens are equipped with an adjustable ventilation system that allows the user to ensure that the system has an adequate air supply. For details,pls visit our website: https://climatechambers.com/articles&latestnews/what-is-the-main-function-of-hot-air-dry-oven.html
Technical Library | 2007-12-06 11:37:15.0
Over the past 30 years we have learned that lead has negative affects on the health of humans and seen strong legislation remove it from gasoline and paints. More recently, governments in Europe and Asia have set deadlines to remove lead from consumer electronic devices that use printed circuit boards. Currently, the ban is not being applied to high reliability applications such as military or medical devices, but we all know that will come someday soon. Likewise many believe that lead free solder is coming to wafer bump reflow and are beginning to make the transition.
Technical Library | 2010-06-30 17:43:04.0
As silicon technology advances to enable higher density ASICs, the core logic voltage decreases. The lower voltage, in combination with higher current requirements, requires tighter tolerances on the power supplies. The control of the power supplies from the PCB to the die is the subject of this study. A frequency sweep simulation using typical bypass values shows that a discrete package capacitor is not a significant factor in reducing the chip core power supply fluctuation. A small voltage boost at the PCB supply can provide a more economical solution to managing the device supplies.
